SB16C1058-TQFP128 IK Semicon Co., Ltd, SB16C1058-TQFP128 Datasheet - Page 19

• Manufacturer Part Number: SB16C1058-TQFP128
• Description: Octal-uart Controller With 256-byte Fifo
• Manufacturer: IK Semicon Co., Ltd

EFR[3] EFR[2] EFR[1] EFR[0] TX, RX software flow controls
Table 4:
X
X
X
X
0
1
0
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
X
X
X
X
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Software flow control options (EFR[3:0])
X
X
X
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
6.5 Software Flow Control
generated by Auto-CTS are removed if MSR is read.
X
X
X
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Software flow control is performed by Xon and Xoff character transmitting/accepting.
Software flow control is enabled/disabled independently by programming EFR[3:0] and
MCR[6:5, 2]. If TX software flow control is enabled by EFR[3:2], Xoff character is
transmitted to report that data can not be accepted when the stored amount of data in
RX FIFO exceeds the value in FUR. After the CPU reads the data in RX FIFO and if the
read amount is less than the value in FLR, Xon character is transmitted to report that
more data can be accepted. If TX software flow control is enabled by EFR[1:0] and Xoff
character is inputted through RXD pin, it means no more data can be accepted, and
data transmission is suspended even though data are in TX FIFO. If Xon character is
received through RXD pin while data transmission is suspended, it means more data
can be accepted, and therefore data in TX FIFO are re-transmitted. These procedures
prevent overruns during communication. If software flow control is disabled, overrun
occurs when the transmit data rate exceeds RX FIFO service latency. Different
combinations of software flow control can be enabled by setting different combinations
of EFR[3:0] . Table 3 shows software flow control options.
No transmit control
Transmit Xon1/Xoff1
Transmit Xon2/Xoff2
Transmit Xon1, Xon2/Xoff1, Xoff2
No receive flow control
Receiver compares Xon1/Xoff1
Receiver compares Xon2/Xoff2
Receiver compares Xon1, Xon2/Xoff1, Xoff2
No transmit control, No receive flow control
No transmit control, Receiver compares Xon1/Xoff1
No transmit control, Receiver compares Xon2/Xoff2
No transmit control, Receiver compares Xon1, Xon2/Xoff1, Xoff2
Transmit Xon1/Xoff1, No receive flow control
Transmit Xon1/Xoff1, Receiver compares Xon1/Xoff1
Transmit Xon1/Xoff1, Receiver compares Xon2/Xoff2
Transmit Xon1/Xoff1, Receiver compares Xon1, Xon2/Xoff1, Xoff2
Transmit Xon2/Xoff2, No receive flow control
Transmit Xon2/Xoff2, Receiver compares Xon1/Xoff1
Transmit Xon2/Xoff2, Receiver compares Xon2/Xoff2
Transmit Xon2/Xoff2, Receiver compares Xon1, Xon2/Xoff1, Xoff2
Transmit Xon2/Xoff2, No receive flow control
Transmit Xon2/Xoff2, Xoff2, Receiver compares Xon1/Xoff1
Transmit Xon1, Xon2/Xoff1, Xoff2, Receiver compares Xon2/Xoff2
Transmit Xon1, Xon2/Xoff1, Xoff2, Receiver compares Xon1, Xon2/Xoff1, Xoff2
OCTAL UART WITH 256-BYTE FIFO
IN16C1058
JUNE 2009
REV 1.0
19