ds3102 Maxim Integrated Products, Inc., ds3102 Datasheet - Page 69

• Manufacturer Part Number: ds3102
• Description: Stratum 3 Timing Card Ic With Synchronous Ethernet Support
• Manufacturer: Maxim Integrated Products, Inc.

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Fast Holdover Frequency Ready (FHORDY). This latched status bit is set to 1 when the T0 DPLL has a
holdover value that has been averaged over the 8-minute holdover averaging period. FHORDY is cleared when
written with a 1. When FHORDY is set it can cause an interrupt request on the INTREQ pin if the FHORDY
interrupt enable bit is set in the
Bit 6: Slow Holdover Frequency Ready (SHORDY). This latched status bit is set to 1 when the T0 DPLL has a
holdover value that has been averaged over the 110-minute holdover averaging period. SHORDY is cleared when
written with a 1. When SHORDY is set it can cause an interrupt request on the INTREQ pin if the SHORDY
interrupt enable bit is set in the
Bit 5: Multiregister Access Aborted (MRAA). This latched status bit is set to 1 when a multibyte access (read or
write) is interrupted by another access to the device. MRAA is cleared when written with a 1. MRAA cannot cause
an interrupt to occur. See Section 8.3.
Rev: 012108
____________________________________________________________________________________________ DS3102
FHORDY
7
0
SHORDY
6
0
IER4
IER4
MSR4
Master Status Register 4
17h
register. See Section 7.7.1.6.
register. See Section 7.7.1.6.
MRAA
5
0
—
4
0
—
0
3
—
2
0
—
1
0
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—
0
0