ds96-039wdsp ETC-unknow, ds96-039wdsp Datasheet - Page 57

• Manufacturer Part Number: ds96-039wdsp
• Description: Clarification Serial Control Register Description Dsp1620/27/28/29 Devices
• Manufacturer: ETC-unknow

February 1997
5 Software Architecture
5.2 Register Settings
Tables 26 through 42 describe the programmable registers of the DSP1628 device. Table 44 describes the register
settings after reset.
Note that the following abbreviations are used in the tables:
The reserved (rsrvd) bits in the tables should always be written with zeros to make the program compatible with
future chip versions.
Table 26. Serial I/O Control Registers
sioc
sioc2
† See tdms register, SYNC field.
‡ The bit definitions of the sioc2 register are identical to the sioc register bit definitions.
Lucent Technologies Inc.
Field
Field DODLY2
Bit
Bit
x = don't care
R = read only
W = read/write
DODLY
‡
OLEN
Field
ILEN
MSB
OCK
OLD
CLK
ICK
ILD
LD
DODLY
10
10
Value
LD2
LD
00
01
10
11
9
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
9
DO changes on the rising edge of OCK.
DO changes on the falling edge of OCK. This delay in driving DO increases the hold
time on DO by half a cycle of OCK.
In active mode, ILD1 and/or OLD1 = ICK1/16, active SYNC1 = ICK1/[128/256
In active mode, ILD1 and/or OLD1 = OCK1/16, active SYNC1 = OCK1/[128/256
Active clock = CKI/2 (1X).
Active clock = CKI/6 (1X).
Active clock = CKI/8 (1X).
Active clock = CKI/10 (1X).
LSB first.
MSB first.
OLD1 is an input (passive mode).
OLD1 is an output (active mode).
ILD1 is an input (passive mode).
ILD1 is an output (active mode).
OCK1 is an input (passive mode).
OCK1 is an output (active mode).
ICK1 is an input (passive mode).
ICK1 is an output (active mode).
16-bit output.
8-bit output.
16-bit input.
8-bit input.
8
8
(continued)
CLK2
CLK
7
7
MSB2
MSB
6
6
OLD2
5
OLD
5
Description
ILD2
DSP1628 Digital Signal Processor
4
ILD
4
OCK2
3
OCK
3
ICK2
2
ICK
2
OLEN2
OLEN
1
1
ILEN2
†
ILEN
].
0
†
0
].
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