ds96-039wdsp ETC-unknow, ds96-039wdsp Datasheet - Page 102

• Manufacturer Part Number: ds96-039wdsp
• Description: Clarification Serial Control Register Description Dsp1620/27/28/29 Devices
• Manufacturer: ETC-unknow

February 1997
10 Timing Characteristics for 2.7 V Operation
Table 90. Timing Characteristics for PHIF Motorola Mode Signaling
* An input/output transaction is initiated by PCSN or PDS going low, whichever comes last. For example, t53 and t54 should be referenced
† PDS is programmable to be active-high or active-low. It is shown active-low in Figures 24 and 25. POBE and PIBF may be programmed to
Table 91. Timing Requirements for PHIF Motorola Mode Signaling
Lucent Technologies Inc.
to PDS going low, if PDS goes low after PCSN. An input/output transaction is completed by PCSN or PDS going high, whichever comes first.
All requirements referenced to PCSN should be referenced to PDS, if PDS is the controlling signal. PRWN should never be used to initiate or
complete a transaction.
be the opposite logic levels shown in the diagram. t53 and t54 apply to the inverted levels as well as those shown.
PBSEL
Abbreviated Reference
PCSN
PODS
POBE
Abbreviated Reference
PIDS
PIBF
V
V
V
V
V
V
V
V
V
V
V
V
OH
OH
OH
OL
OL
OL
IH
IH
IH
IL
IL
IL
t55
t56
Figure 25. PHIF Motorola Mode Signaling (Pulse Period and Flags) Timing Diagram
t53*
t54*
16-bit READ
t55
t53
t56
PCSN/PDS/PRWN Pulse Width (high to low)
PCSN/PDS/PRWN Pulse Width (low to high)
PCSN/PDS
PCSN/PDS
16-bit WRITE
†
†
to POBE
to PIBF
t55
t55
t54
Parameter
Parameter
t56
t56
†
†
(high to high)
(high to high)
(continued)
8-bit READ
DSP1628 Digital Signal Processor
t53
t56
Min
Min
—
—
20
20
t55
8-bit WRITE
Max
Max
t54
17
17
—
—
t56
Unit
5-4039 (C).a
Unit
ns
ns
ns
ns
100