ds96-039wdsp ETC-unknow, ds96-039wdsp Datasheet - Page 22

• Manufacturer Part Number: ds96-039wdsp
• Description: Clarification Serial Control Register Description Dsp1620/27/28/29 Devices
• Manufacturer: ETC-unknow

DSP1628 Digital Signal Processor
4 Hardware Architecture
Table 6. Data Memory Maps
1628x16 Data Memory Map (Not to Scale)
On the data memory side (see Table ), the 1K banks of
dual-port RAM are located starting at address 0. Ad-
dresses from 0x4000 to 0x40FF reference a 256-word
memory-mapped I/O segment (IO). Addresses from
0x4100 to 0x7FFF reference the low external data RAM
segment (ERAMLO). Addresses above 0x8000 refer-
ence high external data RAM (ERAMHI).
20
Address
Decimal
64K – 1
16,640
16K
32K
0
r0, r1, r2, r3
Address in
0xFFFF
0x0000
0x4000
0x4100
0x8000
(continued)
DPRAM[1:16]
ERAMLO
ERAMHI
Segment
IO
1628x08 Data Memory Map (Not to Scale)
Wait-States
The number of wait-states (from 0 to 15) used when ac-
cessing each of the four external memory segments
(ERAMLO, IO, ERAMHI, and EROM) is programmable
in the mwait register (see Table 40). When the program
references memory in one of the four external seg-
ments, the internal multiplexer is automatically switched
to the appropriate set of internal buses, and the associ-
ated external enable of ERAMLO, IO, ERAMHI, or
EROM is issued. The external memory cycle is auto-
matically stretched by the number of wait-states config-
ured in the appropriate field of the mwait register.
Address
Decimal
64K – 1
16,640
16K
32K
8K
0
r0, r1, r2, r3
Address in
0xFFFF
0x0000
0x2000
0x4000
0x8000
0x4100
Lucent Technologies Inc.
February 1997
DPRAM[1:8]
Reserved
ERAMLO
ERAMHI
Segment
IO