tn28f010-90 Intel Corporation, tn28f010-90 Datasheet - Page 7

• Manufacturer Part Number: tn28f010-90
• Description: 1024k 128k X 8 Cmos Flash Memory
• Manufacturer: Intel Corporation

NOTES
1 Refer to DC Characteristics When V
2 Manufacturer and device codes may also be accessed via a command register write sequence Refer to Table 3 All other
addresses low
3 V
4 Read operations with V
5 With V
6 Refer to Table 3 for valid Data-In during a write operation
7 X can be V
tents of the register default to the read command
making the 28F010 a read-only memory In this
mode the memory contents cannot be altered
Or the system designer may choose to ‘‘hardwire’’
V
available In this case all Command Register func-
tions are inhibited whenever V
lockout voltage V
tion) The 28F010 is designed to accommodate ei-
ther design practice and to encourage optimization
of the processor-memory interface
The two-step program erase write sequence to the
Command Register provides additional software
write protections
BUS OPERATIONS
Read
The 28F010 has two control functions both of which
must be logically active to obtain data at the out-
puts Chip-Enable (CE ) is the power control and
should be used for device selection Output-Enable
(OE ) is the output control and should be used to
gate data from the output pins independent of de-
vice selection Refer to AC read timing waveforms
When V
used to access array data to output the Intelligent
Identifier codes and to access data for program
READ WRITE
PP
READ-ONLY
ID
is the Intelligent Identifier high voltage Refer to DC Characteristics
making the high voltage supply constantly
PP
PP
at high voltage the standby current equals I
is high (V
IL
or V
LKO
Read
Output Disable
Standby
Intelligent Identifier (Mfr)
Intelligent Identifier (Device)
Read
Output Disable
Standby
Write
IH
PPH
Mode
(See Power Up Down Protec-
PP
) the read operation can be
e
(5)
V
PPH
CC
may access array data or the Intelligent Identifier codes
is below the write
PP
e
Table 2 28F010 Bus Operations
V
PPL
(2)
memory contents can be read but not written or erased
(2)
CC
V
V
V
V
V
V
V
V
V
V
PP (1)
PPH
PPH
PPH
PPH
PPL
PPL
PPL
PPL
PPL
a
I
PP
erase verification When V
operation can only access the array data
Output Disable
With OE
device is disabled Output pins are placed in a high-
impedance state
Standby
With CE
tion disables most of the 28F010’s circuitry and sub-
stantially reduces device power consumption The
outputs are placed in a high-impedance state inde-
pendent of the OE
lected during erasure programming or program
erase verification the device draws active current
until the operation is terminated
Intelligent Identifier Operation
The Intelligent Identifier operation outputs the manu-
facturer code (89H) and device code (B4H) Pro-
gramming equipment automatically matches the de-
vice with its proper erase and programming algo-
rithms
(standby)
V
V
A
A
A
A
X
X
X
X
IH
IL
0
0
0
0
V
V
A
ID (3)
ID (3)
A
A
A
X
X
X
X
9
9
9
9
at a logic-high level (V
at a logic-high level the standby opera-
CE
V
V
V
V
V
V
V
V
V
IH
IH
IL
IL
IL
IL
IL
IL
IL
signal If the 28F010 is dese-
OE
V
V
V
V
V
V
V
X
X
IH
IH
IH
IL
IL
IL
IL
PP
is low (V
WE
V
V
V
V
V
V
V
X
X
IH
IH
IH
IH
IH
IH
IH
IL
) output from the
PPL
Data Out
Tri-State
Tri-State
Data
Data
Data Out
Tri-State
Tri-State
Data In
DQ
) the read
0
28F010
e
e
– DQ
(6)
89H
B4H
(4)
7
7