tn28f010-90 Intel Corporation, tn28f010-90 Datasheet - Page 2

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tn28f010-90

Manufacturer Part Number
tn28f010-90
Description
1024k 128k X 8 Cmos Flash Memory
Manufacturer
Intel Corporation
Datasheet

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28F010
2
A
DQ
CE
OE
WE
V
V
V
NC
Symbol
0
PP
CC
SS
– A
0
– DQ
16
7
INPUT
INPUT OUTPUT
INPUT
INPUT
INPUT
Type
ADDRESS INPUTS for memory addresses Addresses are internally
latched during a write cycle
DATA INPUT OUTPUT Inputs data during memory write cycles
outputs data during memory read cycles The data pins are active high
and float to tri-state OFF when the chip is deselected or the outputs
are disabled Data is internally latched during a write cycle
CHIP ENABLE Activates the device’s control logic input buffers
decoders and sense amplifiers CE
deselects the memory device and reduces power consumption to
standby levels
OUTPUT ENABLE Gates the devices output through the data buffers
during a read cycle OE
WRITE ENABLE Controls writes to the control register and the array
Write enable is active low Addresses are latched on the falling edge
and data is latched on the rising edge of the WE
Note With V
ERASE PROGRAM POWER SUPPLY for writing the command
register erasing the entire array or programming bytes in the array
DEVICE POWER SUPPLY (5V
GROUND
NO INTERNAL CONNECTION to device Pin may be driven or left
floating
Figure 1 28F010 Block Diagram
Table 1 Pin Description
PP s
6 5V memory contents cannot be altered
Name and Function
is active low
g
10%)
is active low CE
pulse
high
290207 – 1

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