AD9517-0 Analog Devices, Inc., AD9517-0 Datasheet - Page 17

• Manufacturer Part Number: AD9517-0
• Description: 12-output Clock Generator With Integrated 2.8 Ghz Vco
• Manufacturer: Analog Devices, Inc.

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 20. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10, 24, 25, 30, 31,
36, 37, 43, 45
11
12
13
14
15
16
17
18
21, 40
42
41
39
38
19
Mnemonic
REFMON
LD
VCP
CP
STATUS
REF_SEL
SYNC
LF
BYPASS
VS
CLK
CLK
SCLK
CS
SDO
SDIO
RESET
PD
VS_LVPECL
OUT0
OUT0
OUT1
OUT1
OUT2
Description
Reference Monitor (Output). This pin has multiple selectable outputs; see Table 53 0x1B.
Lock Detect (Output). This pin has multiple selectable outputs; see Table 53 0x1A.
Power Supply for Charge Pump (CP); V
Charge Pump (Output). Connects to external loop filter.
Status (Output). This pin has multiple selectable outputs; see Table 53 0x17.
Reference Select. Selects REF1 (low) or REF2 (high). This pin has an internal 30 kΩ pull-down resistor.
Manual Synchronizations and Manual Holdover. This pin initiates a manual synchronization and is
also used for manual holdover. Active low. This pin has an internal 30 kΩ pull-up resistor.
Loop Filter (Input). Connects to VCO control voltage node internally.
This pin is for bypassing the LDO to ground with a capacitor.
3.3 V Power Pins.
Along with CLK, this is the differential input for the clock distribution section.
Along with CLK, this is the differential input for the clock distribution section.
Serial Control Port Data Clock Signal.
Serial Control Port Chip Select; Active Low. This pin has an internal 30 kΩ pull-up resistor.
Serial Control Port Unidirectional Serial Data Out.
Serial Control Port Bidirectional Serial Data In/Out.
Chip Reset; Active Low. This pin has an internal 30 kΩ pull-up resistor.
Chip Power Down; Active Low. This pin has an internal 30 kΩ pull-up resistor.
Extended Voltage 2.5 V to 3.3 V LVPECL Power Pins.
LVPECL Output; One Side of a Differential LVPECL Output.
LVPECL Output; One Side of a Differential LVPECL Output.
LVPECL Output; One Side of a Differential LVPECL Output.
LVPECL Output; One Side of a Differential LVPECL Output.
LVPECL Output; One Side of a Differential LVPECL Output.
REF_SEL
REFMON
BYPASS
STATUS
SYNC
VCP
CLK
CLK
LD
CP
VS
LF
10
11
12
1
2
3
4
5
6
7
8
9
PIN 1
INDICATOR
Figure 6. Pin Configuration
(Not to Scale)
Rev. 0 | Page 17 of 80
AD9517-0
TOP VIEW
S
< V
CP
< 5.0 V.
36
35
34
33
32
31
30
29
28
27
26
25
VS
OUT4 (OUT4A)
OUT4 (OUT4B)
OUT5 (OUT5A)
OUT5 (OUT5B)
VS
OUT7 (OUT7B)
OUT7 (OUT7A)
OUT6 (OUT6B)
OUT6 (OUT6A)
AD9517-0