MT18LSDT6472 Micron, MT18LSDT6472 Datasheet

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MT18LSDT6472

Manufacturer Part Number
MT18LSDT6472
Description
168-Pin SDRAM DIMMs (x72) ECC
Manufacturer
Micron
Datasheet
SYNCHRONOUS
DRAM MODULE
FEATURES
• JEDEC-standard 168-pin, dual in-line memory
• PC133- and PC100-compliant
• Registered inputs with one-clock delay
• Phase-lock loop (PLL) clock driver to reduce loading
• Utilizes 100 MHz and 133 MHz SDRAM components
• ECC-optimized pinout
• Single +3.3V ±0.3V power supply
• Fully synchronous; all signals registered on
• Internal pipelined operation; column address can
• Internal SDRAM banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto Precharge and Auto Refresh Modes
• Self Refresh Mode
• 128MB and 256MB: 64ms, 4,096-cycle refresh;
• LVTTL-compatible inputs and outputs
• Serial Presence-Detect (SPD)
OPTIONS
• Package
• Frequency/CAS Latency*
*
16, 32, 64 Meg x 72 PC133/PC100 Registered SDRAM DIMMs
SD18C16_32_64x72G_B.p65 – Pub. 11/01
DEVICE TIMING
ADDRESS TABLE
Refresh Count
Device Configuration
Device Banks
Row Addressing
Column Addressing
Module Banks
An extra clock cycle will be incurred when the module is in registered
mode.
module (DIMM)
positive edge of PLL clock
be changed every clock cycle
512MB: 64ms, 8,192-cycle refresh
168-pin DIMM (gold)
133 MHz/CL = 2
133 MHz/CL = 3
100 MHz/CL = 2
Markings
Module
-13E
-133
-10E
4K (A0–A11)
4 (BA0, BA1)
1K (A0–A9)
16 Meg x 4
Module
128MB
1 (S0,S2)
4K
CL -
2 - 2 - 2
2 - 2 - 2
2 - 2 - 2
PC100
t
RCD -
2K (A0–A9,A11)
t
4K (A0–A11)
4 (BA0, BA1)
RP
32 Meg x 4
Module
256MB
1 (S0,S2)
4K
CL -
MARKING
2 - 2 - 2
3 - 3 - 3
PC133
t
RCD -
2K (A0-A9,A11)
NA
4 (BA0, BA1)
8K (A0-A12)
64 Meg x 4
Module
512MB
1 (S0,S2)
-13E
-10E
-133
8K
G
t
RP
1
168-PIN REGISTERED SDRAM DIMM
128MB / 256MB / 512MB (x72, ECC)
MT18LSDT1672G, MT18LSDT3272G,
MT18LSDT6472G
For the latest data sheet, please refer to the Micron Web
site:
NOTE: Pin 126 is a NC for the 128MB and 256MB module. It is A12 for the
PIN SYMBOL PIN SYMBOL
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
1
2
3
4
5
6
7
8
9
www.micron.com/datasheets
512MB module.
PIN ASSIGNMENT (FRONT VIEW)
DQMB0
DQMB1
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
WE#
BA1
CB0
CB1
A10
CK0
V
V
V
V
V
S0#
V
V
V
NC
NC
NC
V
A0
A2
A4
A6
A8
DD
DD
DD
DD
DD
SS
SS
SS
SS
Micron Technology, Inc., reserves the right to change products or specifications without notice.
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
168-PIN DIMM
DQMB2
DQMB3
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
SDA
V
CB2
CB3
V
V
CK2
SCL
V
S2#
WP
V
NC
NC
NC
NC
V
NC
NC
NC
V
V
V
NC
DD
DD
DD
DD
SS
SS
SS
SS
SS
PIN SYMBOL PIN SYMBOL
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
DQMB4
DQMB5
NC/A12
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
CAS#
RAS#
BA0
CB4
CB5
A11
CK1
V
V
V
V
V
V
V
NC
NC
NC
V
A1
A3
A5
A7
A9
DD
DD
DD
DD
SS
SS
SS
SS
©2001, Micron Technology, Inc.
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
DQMB6
DQMB7
DQ48
DQ49
DQ50
DQ51
DQ52
REGE
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
CKE0
CB6
CB7
CK3
SA0
SA1
SA2
V
V
V
V
V
NC
NC
NC
NC
V
NC
NC
V
V
V
NC
DD
DD
DD
DD
SS
SS
SS
SS
SS

Related parts for MT18LSDT6472

MT18LSDT6472 Summary of contents

Page 1

... Module Banks 1 (S0,S2) 1 (S0,S2) 16, 32, 64 Meg x 72 PC133/PC100 Registered SDRAM DIMMs SD18C16_32_64x72G_B.p65 – Pub. 11/01 128MB / 256MB / 512MB (x72, ECC) 168-PIN REGISTERED SDRAM DIMM MT18LSDT1672G, MT18LSDT3272G, MT18LSDT6472G For the latest data sheet, please refer to the Micron Web site: www.micron.com/datasheets PIN SYMBOL PIN SYMBOL ...

Page 2

... Example: MT18LSDT1672G-133B1 GENERAL DESCRIPTION The MT18LSDT1672G, MT18LSDT3272G, and MT18LSDT6472G are high-speed CMOS, dynamic ran- dom-access, 128MB, 256MB, and 512MB memory mod- ules organized in a x72 (ECC) configuration. These mod- ules use internally configured quad-bank SDRAM de- vices, with a synchronous interface (all signals are regis- tered on the positive edge of clock signal CK0) ...

Page 3

... MT18LSDT1672G (128MB), MT18LSDT3272G (256MB), MT18LSDT6472G (512MB) RAS# CAS# CKE0 WE# (128MB/256MB) – A0-A11 (512MB) – A0-A12 BA0 BA1 S0#, S2# DQMB0 - DQMB7 10K V DD REGE PLL CLK NOTE: 1. All resistor values are 10 ohms unless otherwise specified. 16, 32, 64 Meg x 72 PC133/PC100 Registered SDRAM DIMMs SD18C16_32_64x72G_B.p65 – ...

Page 4

... Serial Clock for Presence-Detect: SCL is used to synchronize the presence-detect data transfer to and from the module. Input Presence-Detect Address Inputs: These pins are used to configure the presence-detect device. Input Register Enable. Micron Technology, Inc., reserves the right to change products or specifications without notice. 4 DESCRIPTION ©2001, Micron Technology, Inc. ...

Page 5

... Supply Power Supply: +3.3V ±0.3V. DD Supply Ground. SS – Not Connected: These pins are not connected on these modules. 5 DESCRIPTION Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2001, Micron Technology, Inc. ...

Page 6

... After the AUTO REFRESH cycles are complete, the SDRAM is ready for mode register programming. Because the mode register will power unknown state, it should be loaded prior to applying any operational command. Micron Technology, Inc., reserves the right to change products or specifications without notice. 6 and V Q (simulta © ...

Page 7

... Full-page bursts wrap within the page if the boundary is reached, as shown in the Burst Definition Table. Micron Technology, Inc., reserves the right to change products or specifications without notice. 7 ©2001, Micron Technology, Inc. ...

Page 8

... For a burst length of one, A0-A9 or A0-A9/A11 select the unique column to be accessed, and Mode Register bit M3 is ignored. Micron Technology, Inc., reserves the right to change products or specifications without notice. Type = Interleaved 0-1 1-0 0-1-2-3 ...

Page 9

... NOP NOP OUT t AC DON’T CARE UNDEFINED 9 CAS LATENCY TABLE ALLOWABLE OPERATING FREQUENCY (MHz) CAS CAS LATENCY = 2* LATENCY = 3* 133 143 100 133 100 NA Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2001, Micron Technology, Inc. ...

Page 10

... – – – – L – – – – H Micron Technology, Inc., reserves the right to change products or specifications without notice NOTES Bank/Row X 3 Bank/Col X 4 Bank/Col Valid 4 X Active Code ...

Page 11

... SYMBOL Micron Technology, Inc., reserves the right to change products or specifications without notice UNITS NOTES -0.3 0 -10 10 µ µA 33 -10 10 µA 33 2.4 – ...

Page 12

... Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2001, Micron Technology, Inc. 3, 18, 19 12, 19 18, 19 12, 18, 19, 30 18, 19 12, 19 18, ...

Page 13

... DD I 2,430 2,430 2,430 5,130 4,860 4,860 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2001, Micron Technology, Inc. 3, 18, 19 12, 19 18, 19 12, 18, 19, 30 ...

Page 14

... – – – – 1 Micron Technology, Inc., reserves the right to change products or specifications without notice. 14 TYP MAX UNITS 8 – – – – – – ...

Page 15

... CLK + 7ns Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2001, Micron Technology, Inc. NOTES ...

Page 16

... DPL 2 t BDL 1 t CDL 1 t RDL 2 t MRD ROH( ROH(2) 2 Micron Technology, Inc., reserves the right to change products or specifications without notice. 16 -133 -10E UNITS NOTES 14 14 17, 32 ...

Page 17

... 45ns 10ns; for -133 and 7.5ns; for -13E and RFC (MIN) else CKE is LOW. The I Micron Technology, Inc., reserves the right to change products or specifications without notice. t RP; clock( 7.5ns for - undershoot 7.5ns. ...

Page 18

... SCL SDA DATA STABLE Figure 3 18 START BIT Figure 2 Definition of Start and Stop 8 9 Acknowledge Micron Technology, Inc., reserves the right to change products or specifications without notice. STOP BIT ©2001, Micron Technology, Inc. ...

Page 19

... RESTART, DEVICE SELECT SIMILAR TO CURRENT OR RANDOM ADDRESS READ START, DEVICE SELECT START, DEVICE SELECT SU:DAT t SU:STO MIN 4 4.7 250 4.7 4.7 Micron Technology, Inc., reserves the right to change products or specifications without notice BUF UNDEFINED MAX UNITS µs µ ...

Page 20

... I 100 ns t LOW 4.7 µ µs t SCL 100 KHz t SU:DAT 250 ns t SU:STA 4.7 µs t SU:STO 4.7 µs t WRC 10 ms Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2001, Micron Technology, Inc. UNITS µA µA µA mA NOTES 2 ...

Page 21

... RP 15 (-13E) 20 (-133/-10E) 14 (-13E) 15 (-133) 20 (-10E) t RCD 15 (-13E) 20 (-133/-10E) t RAS 45 (-13E) 44 (-133) 50 (-10E MT18LSDT3272G MT18LSDT6472G ...

Page 22

... DS 1.5 (-13E/-133) 2 (-10E 0.8 (-13E/-133) 1 (-10E) REV. 1.2 -13E -133 -10E MICRON 100/133 MHz 22 MT18LSDT3272G MT18LSDT6472G ...

Page 23

... S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 E-mail: prodmktg@micron.com, Internet: http://www.micron.com, Customer Comment Line: 800-932-4992 Micron is a registered trademark and the Micron logo and M logo are trademarks of Micron Technology, Inc. 16, 32, 64 Meg x 72 PC133/PC100 Registered SDRAM DIMMs SD18C16_32_64x72G_B.p65 – Pub. 11/01 ...

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