LM3S1150 Luminary Micro, Inc, LM3S1150 Datasheet - Page 62
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LM3S1150
Manufacturer Part Number
LM3S1150
Description
Lm3s1150 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1150.pdf
(513 pages)
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System Control
6.1.3
6.1.4
62
The watchdog reset timing is shown in Figure 21-14 on page 485.
Power Control
The Stellaris
power to the majority of the controller's internal logic. The LDO regulator provides software a
mechanism to adjust the regulated value, in small increments (VSTEP), over the range of 2.25 V
to 2.75 V (inclusive)—or 2.5 V ± 10%. The adjustment is made by changing the value of the VADJ
field in the LDO Power Control (LDOPCTL) register. Figure 6-2 on page 62 shows the power
architecture.
Note:
Figure 6-2. Power Architecture
Clock Control
System control determines the control of clocks in this part.
+3.3V
On the printed circuit board, use the LDO output as the source of VDD25 input. In addition,
the LDO requires decoupling capacitors. See “On-Chip Low Drop-Out (LDO) Regulator
Characteristics” on page 475.
VDD25
VDD25
VDD25
VDD25
VDDA
VDDA
VDD
VDD
VDD
VDD
LDO
®
microcontroller provides an integrated LDO regulator that may be used to provide
Analog circuits
Logic and PLL
Low-noise
(ADC, analog
comparators)
I/O Buffers
LDO
Internal
Preliminary
GND
GND
GND
GND
GNDA
GNDA
GND
GND
GND
GND
July 26, 2008
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