LM3S1150 Luminary Micro, Inc, LM3S1150 Datasheet - Page 459
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LM3S1150
Manufacturer Part Number
LM3S1150
Description
Lm3s1150 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1150.pdf
(513 pages)
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July 26, 2008
Pin Number
A10
A12
B10
B12
A11
B11
A8
A9
B1
B2
B3
B4
B5
B6
B7
B8
B9
C1
C2
C3
Pin Name
SSI1Clk
SSI1Fss
SSI1Tx
SSI1Rx
SWCLK
SWDIO
CMOD1
VDD25
TRST
GNDA
PWM5
PWM4
PB7
PC0
TCK
PC3
TDO
SWO
PE0
PE3
GND
PB5
C1-
PC2
TDI
PC1
TMS
PE2
PE1
PE7
PE6
NC
NC
NC
NC
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
-
-
-
-
-
-
-
I
I
I
I
I
I
Buffer Type
Analog
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
-
-
-
-
Description
GPIO port B bit 7
JTAG TRSTn
GPIO port C bit 0
JTAG/SWD CLK
JTAG/SWD CLK
GPIO port C bit 3
JTAG TDO and SWO
JTAG TDO and SWO
GPIO port E bit 0
SSI module 1 clock
GPIO port E bit 3
SSI module 1 transmit
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
Ground reference for logic and I/O pins.
GPIO port B bit 5
Analog comparator 1 negative input
GPIO port C bit 2
JTAG TDI
GPIO port C bit 1
JTAG TMS and SWDIO
JTAG TMS and SWDIO
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
GPIO port E bit 2
SSI module 1 receive
GPIO port E bit 1
SSI module 1 frame
GPIO port E bit 7
PWM 5
GPIO port E bit 6
PWM 4
Positive supply for most of the logic function,
including the processor core and most
peripherals.
LM3S1150 Microcontroller
459
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