LM3S1150 Luminary Micro, Inc, LM3S1150 Datasheet - Page 399
![no-image](/images/no-image-200.jpg)
LM3S1150
Manufacturer Part Number
LM3S1150
Description
Lm3s1150 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1150.pdf
(513 pages)
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Reset
Reset
Type
Type
PWM Time Base Sync (PWMSYNC)
Base 0x4002.8000
Offset 0x004
Type R/W, reset 0x0000.0000
July 26, 2008
Bit/Field
31:3
2
1
0
RO
RO
31
15
0
0
Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004
This register provides a method to perform synchronization of the counters in the PWM generation
blocks. Writing a bit in this register to 1 causes the specified counter to reset back to 0; writing
multiple bits resets multiple counters simultaneously. The bits auto-clear after the reset has occurred;
reading them back as zero indicates that the synchronization has completed.
RO
RO
30
14
0
0
reserved
RO
RO
29
13
0
0
Name
Sync2
Sync1
Sync0
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
R/W
R/W
R/W
RO
RO
RO
26
10
0
0
reserved
Reset
0x00
RO
RO
25
0
9
0
0
0
0
Preliminary
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Reset Generator 2 Counter
Performs a reset of the PWM generator 2 counter.
Reset Generator 1 Counter
Performs a reset of the PWM generator 1 counter.
Reset Generator 0 Counter
Performs a reset of the PWM generator 0 counter.
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
LM3S1150 Microcontroller
RO
RO
19
0
3
0
Sync2
R/W
RO
18
0
2
0
Sync1
R/W
RO
17
0
1
0
Sync0
R/W
RO
16
0
0
0
399
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