LM3S1150 Luminary Micro, Inc, LM3S1150 Datasheet - Page 174
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LM3S1150
Manufacturer Part Number
LM3S1150
Description
Lm3s1150 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1150.pdf
(513 pages)
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Reset
Reset
Type
Type
General-Purpose Input/Outputs (GPIOs)
GPIO Interrupt Both Edges (GPIOIBE)
GPIO Port A base: 0x4000.4000
GPIO Port B base: 0x4000.5000
GPIO Port C base: 0x4000.6000
GPIO Port D base: 0x4000.7000
GPIO Port E base: 0x4002.4000
GPIO Port F base: 0x4002.5000
GPIO Port G base: 0x4002.6000
GPIO Port H base: 0x4002.7000
Offset 0x408
Type R/W, reset 0x0000.0000
174
Bit/Field
31:8
7:0
RO
RO
31
15
0
0
Register 4: GPIO Interrupt Both Edges (GPIOIBE), offset 0x408
The GPIOIBE register is the interrupt both-edges register. When the corresponding bit in the GPIO
Interrupt Sense (GPIOIS) register (see page 173) is set to detect edges, bits set to High in GPIOIBE
configure the corresponding pin to detect both rising and falling edges, regardless of the
corresponding bit in the GPIO Interrupt Event (GPIOIEV) register (see page 175). Clearing a bit
configures the pin to be controlled by GPIOIEV. All bits are cleared by a reset.
RO
RO
30
14
0
0
reserved
RO
RO
29
13
0
0
Name
IBE
RO
RO
28
12
0
0
reserved
RO
RO
27
11
0
0
Type
R/W
RO
RO
RO
26
10
0
0
Reset
0x00
0x00
RO
RO
25
0
9
0
Preliminary
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPIO Interrupt Both Edges
The IBE values are defined as follows:
Value
reserved
0
1
R/W
RO
23
Description
Interrupt generation is controlled by the GPIO Interrupt Event
(GPIOIEV) register (see page 175).
Both edges on the corresponding pin trigger an interrupt.
Note:
0
7
0
R/W
RO
22
0
6
0
Single edge is determined by the corresponding bit
in GPIOIEV.
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
IBE
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
July 26, 2008
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
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