VG36641641DT-6 Powerchip, VG36641641DT-6 Datasheet - Page 13

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VG36641641DT-6

Manufacturer Part Number
VG36641641DT-6
Description
CMOS Synchronous Dynamic RAM
Manufacturer
Powerchip
Datasheet

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Part Number:
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VIS
2.5 Command Truth Table for CKE (Note 1)
Note:
Current state
Self refresh
Self refresh
recovery
Power down
(P.D.)
Both banks
idle
Any state
other than
listed above
Document :1G5-0177
(S.R.)
1. H : Hight level, L : low level, X : High or low level (Don't care).
2. CKE Low to High transition will re-enable CLK and other inputs asynchronously. A minimum setup
3. Power down and Self refresh can be entered only from the both banks idle state.
4. Must be legal command as defined in Operative Command Table.
5. Illegal if t
time must be satisfied before any command other than EXIT.
SREX
CKE
n - 1
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
is not satisfied.
CKE
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
X
X
n
L
L
L
L
L
L
L
L
L
L
L
L
L
L
CS
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
RAS CAS
H
H
H
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
L
L
H
H
H
H
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
WE
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
H
X
X
X
H
X
X
X
X
X
VG36644041DT / VG36648041DT / VG36641641DT
L
L
Rev.5
Address
Op - Code Refer to operations in Operative
Op - Code Refer to operations in Operative
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
INVALID, CLK (n - 1)would exit S.R.
S.R. Recovery
S.R. Recovery
ILLEGAL
ILLEGAL
Maintain S.R.
Idle after t
Idle after t
ILLEGAL
ILLEGAL
Begin clock suspend next cycle
Begin clock suspend next cycle
ILLEGAL
ILLEGAL
Exit clock suspend next cycle
Maintain clock suspend
INVALID, CLK (n - 1) would exit P.D.
EXIT P.D.
Maintain power down mode
Refer to operations in Operative
Command Table
Refer to operations in Operative
Command Table
Refer to operation in Operative
Command Table
Auto Refresh
Command Table
Refer to operations in Operative
Command Table
Refer to operations in Operative
Command Table
Refer to operations in Operative
Command Table
Self refresh
Command Table
Power down
Refer to operations in Operative
Command Table
Begin clock suspend next cycle
Exit clock suspend next cycle
Maintain clock suspend
CMOS Synchronous Dynamic RAM
RC
RC
Idle
Action
Page 13
Notes
2
2
5
5
2
2
3
3
4

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