VG36128161BT-8H Powerchip, VG36128161BT-8H Datasheet
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VG36128161BT-8H
Manufacturer Part Number
VG36128161BT-8H
Description
CMOS Synchronous Dynamic RAM
Manufacturer
Powerchip
Datasheet
1.VG36128161BT-8H.pdf
(69 pages)
Description
dynamic random-access memories, organized as 8,388,608 x 4 x 4, 4,194,304 x 8 x 4 and 2,097,152 x 16 x
4 (word x bit x bank), respectively.
and outputs are synchronized with the positive edge of the clock.The synchronous DRAMs are compatible
with Low Voltage TTL (LVTTL).These products are packaged in 54-pin TSOPII or 54-ball VFBGA (x16 only).
Features
• Single 3.3V (
• High speed clock cycle time -6: 166MHz<3-3-3>, -7H: 133MHz<2-2-2>,
• Fully synchronous operation referenced to clock rising edge
• Possible to assert random column access in every cycle
• Quad internal banks controlled by BA0 & BA1 (Bank Select)
• Byte control by LDQM and UDQM for VG36128161B
• Programmable Wrap sequence (Sequential / Interleave)
• Programmable burst length (1, 2, 4, 8 and full page)
• Programmable /CAS latency (2 and 3)
• Automatic precharge and controlled precharge
• CBR (Auto) refresh and self refresh
• X4, X8, X16 organization
• LVTTL compatible inputs and outputs
• 4,096 refresh cycles / 64ms
.
VIS
Document :1G5-0183
The VG36128401B, VG36128801B and VG36128161B are high-speed 134,217,728-bit synchronous
The synchronous DRAMs achieve high-speed data transfer using the pipeline architecture. All inputs
0.3V
) power supply
-7L:133MHz<3-3-3>, -8H: 100MHz<2-2-2>
Rev.5
VG36128401B / VG36128801B / VG36128161B
CMOS Synchronous Dynamic RAM
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