CY22150ZC Cypress Semiconductor, CY22150ZC Datasheet - Page 2

• Manufacturer Part Number: CY22150ZC
• Description: One-PLL General-Purpose Flash-Programmable and 2-Wire Serially Programmable Clock Generator
• Manufacturer: Cypress Semiconductor

Document #: 38-07104 Rev. *F
Pin Definitions
Frequency Calculation and Register Definitions
The CY22150 is an extremely flexible clock generator with four
basic variables that can be used to determine the final output
frequency. They are the input reference frequency (REF), the
internally calculated P and Q dividers, and the post divider,
which can be a fixed or calculated value. There are three basic
formulas for determining the final output frequency of a
CY22150-based design:
Note:
1.
Part Number
• CLK = ((REF * P)/Q)/Post Divider
• CLK = REF/Post Divider
• CLK = REF.
Pin Name
CY22150FC
CY22150FI
Float XOUT if XIN is driven by an external clock source.
XOUT
LCLK1
LCLK2
LCLK3
LCLK4
AVDD
SDAT
AVSS
VSSL
SCLK
VDDL
CLK5
CLK6
VDD
VSS
XIN
[1]
Outputs
Pin Number
6
6
10
12
13
14
15
16
11
1
2
3
4
5
6
7
8
9
8 MHz–30 MHz (external crystal)
1 MHz–133 MHz (driven clock)
8 MHz–30 MHz (external crystal)
1 MHz–133 MHz (driven clock)
Input Frequency Range
Reference Input. Driven by a crystal (8 MHz – 30 MHz) or external clock (1 MHz – 133 MHz).
Programmable input load capacitors allow for maximum flexibility in selecting a crystal,
regardless of manufacturer, process, performance, or quality.
3.3V voltage supply
3.3V analog voltage supply
Serial data input
Analog ground
LCLK ground
Configurable clock output 1 at V
Configurable clock output 2 at V
Configurable clock output 3 at V
Serial clock input
LCLK voltage supply (2.5V or 3.3V)
Configurable clock output 4 at V
Ground
Configurable clock output 5 (3.3V)
Configurable clock output 6 (3.3V)
Reference output
Pin Description
80 kHz–200 MHz (3.3V)
80 KHz–166.6 MHz (2.5V)
80 kHz – 166.6 MHz (3.3V)
80 KHz – 150 MHz (2.5V)
The basic PLL block diagram is shown in Figure 1. Each of the
six clock outputs on the CY22150 has a total of seven output
options available to it. There are six post divider options
available: /2 (two of these), /3, /4, /DIV1N and /DIV2N. DIV1N
and DIV2N are independently calculated and are applied to
individual output groups. The post divider options can be
applied to the calculated VCO frequency ((REF*P)/Q) or to the
REF directly.
In addition to the six post divider output options, the seventh
option bypasses the PLL and passes the REF directly to the
crosspoint switch matrix.
Output Frequency Range
DDL
DDL
DDL
DDL
level (3.3V or 2.5V)
level (3.3V or 2.5V)
level (3.3V or 2.5V)
level (3.3V or 2.5V)
Field programmable
Serially programmable
Commercial temperature
Field programmable
Serially programmable
Industrial temperature
Specifications
CY22150
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