AN1740 Freescale Semiconductor / Motorola, AN1740 Datasheet - Page 75

• Manufacturer Part Number: AN1740
• Description: Applications Using the Analog Subsystem on MC68HC05JJ/JP Series Microcontrollers
• Manufacturer: Freescale Semiconductor / Motorola

Design Check List
AN1740
MOTOROLA
Comparators
Comparators
Comparators
Comparators
Comparators
Comparators
Comparators
Current source
Discharge
Channel
Channel
All A/D modes
All A/D modes
All A/D modes
All A/D modes
device
mulitplexers
multiplexers
subsystem
Analog
feature
At least one input must always be within the common mode range.
The INV bit should be used when one input is within V IO of V
Always clear the CPF1 and CPF2 flag bits after changing the INV bit.
Input pulse times should be longer than the sample rate of CMP1 or CMP2.
Analyze code used with comparators for exact read and write cycle timing.
Should input pulldowns on port B be OFF when using comparators?
Allow time for the comparators and the bias source to power up before sampling
Clear the ISEN to disable the current source and reduce power consumption
Avoid capacitors greater than 2 F and discharge currents more than 25 mA.
The channel multiplexers require that any make-before-break or break-before-
The input divider ratio will be altered if multiple channels are turned on in parallel
Be sure to turn off the pulldown on PB0 when making A/D conversions. If this
Make allowance for the worst case variation in the external capacitor, oscillator
Provide checks and corrections for the six faults that can occur with single slope
Use a proper type of capacitor for the external ramp capacitor to avoid problems
their outputs or trying to clear any CPF1 or CPF2 flags.
make considerations are done in software with separate write cycles to the
AMUX register.
at the same time.
pulldown is left on the resulting charge characteristic will look more like an RC
charge curve than a constant current ramp.
frequency, full scale voltage and charging current when planning maximum and
minimum time requirements.
A/D converters.
with linearity on long conversion times.
Table 7
analog subsystem with a reference to the page of the section where the
item is discussed. Many of these topics are given earlier as notes.
Freescale Semiconductor, Inc.
For More Information On This Product,
contains a listing of major considerations for each feature of the
Table 7. Design Checklist
Go to: www.freescale.com
Design consideration
SS
.
Design Check List
Application Note
number
to page
21,
28,
32,
Refer
14
17
19
21
63
42
25
29
42
50
52
71
45
72
37
75