AN1740 Freescale Semiconductor / Motorola, AN1740 Datasheet - Page 38

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AN1740

Manufacturer Part Number
AN1740
Description
Applications Using the Analog Subsystem on MC68HC05JJ/JP Series Microcontrollers
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Application Note
38
NOTE:
NOTE:
microseconds). If four NOP instructions are inserted between the
instructions that set and clear the DHOLD bit, then this will add an
additional eight CPU cycles which, when combined with the original four
CPU cycles, will give an equivalent delay of about six microseconds. If
insufficient time is given to allow the sample capacitor to fully charge (or
discharge) to a new voltage, then such measurements will be in error.
It is important that the INV and VOFF bits are not changed during the
time that a voltage is being held on the sample capacitor. The exchange
of inputs and switching currents can easily corrupt, if not completely
discharge, the sampled voltage.
The sample capacitor typically can hold its charge for several minutes at
room temperature, but due to inherent leakage currents, this degrades
quickly as the temperature is raised. Leakage currents in silicon double
every 10 C such that a minute decay time can degrade to less than a
second at 85 C. In practice, the decay rate of 0.2 V/second should be
used for the overall temperature range of –40 C to + 85 C.
The window on erasable EPROM devices must be covered with an
opaque material such as black electrical tape. Common white paper
labels are not opaque enough to prevent light from affecting bias
currents, trip points, and leakage in the analog subsystem.
One observed source of sample corruption comes from V
bounce noise, which tends to disturb the multiplexers attached to the
sample capacitor. If they turn on, even for a few nanoseconds, the
voltage to which they are connected, either higher or lower, will be
connected to the sample capacitor and will alter its charged voltage.
Input signals which remain connected to their source are not affected by
these noise spikes signals due to their short durations. In many cases,
the user is in control of the significant sources of ground bounce noise.
These occur when the MCU’s I/O pins suddenly turn on and sink high
currents through the V
loads does not occur during the time the sample capacitor must hold its
charge. Other sources can be poor layouts.
Another source of sample corruption comes from substrate current
injection which can occur when the input protection diodes begin
conduction in order to limit inputs which have gone above V
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SS
pin. It is recommended that switching of any
SS
DD
ground
MOTOROLA
or below
AN1740

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