AN1740 Freescale Semiconductor / Motorola, AN1740 Datasheet - Page 55
![no-image](/images/no-image-200.jpg)
AN1740
Manufacturer Part Number
AN1740
Description
Applications Using the Analog Subsystem on MC68HC05JJ/JP Series Microcontrollers
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
1.AN1740.pdf
(80 pages)
- Current page: 55 of 80
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Extra Conversion
A/D Fault
AN1740
MOTOROLA
time fault. However, when the maximum time is reached, the CMP2 flag
will now be high indicating that the ramp was always above the input
level. Therefore, the input is at or below the minimum conversion level,
the conversion can be terminated, and the conversion result can be
forced to its minimum value.
When the PB0 pin has been discharged and the input voltage is near
V
PB0 pin can cause comparator 2 to switch as shown in
the CPF2 flag bit will be set even though there is no conversion ramp in
progress. In this case the polarity of the comparator’s input offset voltage
is not as important, as this behavior can be seen in both cases.
In mode 0 or mode 1, the user has complete control over the conversion
process and can reset any noise induced CPF2 static flags. But, in mode
2 or mode 3, the presence of a noise pulse will not only set the CPF2
static flag bit, but it will trigger an input capture to the 16-bit timer. These
captured times appear like completed conversions with unexpected
timing. Therefore, the A/D conversion software should clear out any
extra CPF2 flags before starting another conversion.
SS
Freescale Semiconductor, Inc.
TOF/OCF
, the presence of noise on either the measured input voltage or the
CPFR2
CMP2
CPF2
For More Information On This Product,
CHG
ICF
V
V
P
N
Go to: www.freescale.com
V
SS
Figure 23. Noise on Signals Near V
50
mV
NOISE
SPIKE
MODE 2 OR MODE 3 ONLY
Pitfalls in Using Single Slope A/D
MODE 2 OR MODE 3 ONLY
SS
Figure
Application Note
23, and
55
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