AN1740 Freescale Semiconductor / Motorola, AN1740 Datasheet - Page 63
![no-image](/images/no-image-200.jpg)
AN1740
Manufacturer Part Number
AN1740
Description
Applications Using the Analog Subsystem on MC68HC05JJ/JP Series Microcontrollers
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
1.AN1740.pdf
(80 pages)
- Current page: 63 of 80
- Download datasheet (535Kb)
Software
Example 1 —
Simple Mode 0
A/D Timing
10
11 0806 0E1E03 [ 5] ATDLP
12 0809 4C
13 080A 20FA
14 080C 9D
Software
Example 2 —
Balanced Mode 0
A/D Timing
10 0806 21FE
11
12
13 0808 0E1E07 [ 5] ATDLP
14
15
16
17
18 080B AB01
19
20
21
22 080D 9D
23 080E 9D
24 080F 24F7
25
26
27
28
29
30
31
32 0811 9D
33 0812 9D
AN1740
MOTOROLA
1 0800
2 0800 1A1E
3 0802 9B
4 0803 4F
5
6 0804 1E1D
7
8
1 0800
2 0800 1A1E
3 0802 9B
4 0803 4F
6 0804 1E1D
7
8
9
[ 5] ATDGO1 bset
[ 2]
[ 3]
[ 5]
[ 3]
[ 3]
[ 2] DONE
[ 5] ATDGO2 bset
[ 2]
[ 3]
[ 5]
[ 3]
[ 2]
[ 2]
[ 2]
[ 3]
[ 2] FAULT
[ 2] DONE
Freescale Semiconductor, Inc.
For More Information On This Product,
org
sei
clra
bset
brset
inca
bra
*
org
sei
clra
bset
brn
brset
add
nop
nop
bcc
*
*
Go to: www.freescale.com
$0800
CPFR2,ASR
CHG,ACR
CPF2,ASR,DONE
ATDLP
$0800
CPFR2,ASR
CHG,ACR
*
CPF2,ASR,DONE
#$01
ATDLP
;Set CPFR2 to clear CPF2
;Hold off interrupts
;Clear accumulator count
; to reset conversion count
;Fire off current source
; ramp. Actual write to CHG
; occurs one cycle before
; next opcode is fetched.
;Test state of comp 2 flag
;Increment ACCA.
;Branch back to flag check.
;Hold off interrupts
; to reset conversion count
;Fire off current source
; ramp. Actual write to CHG
; occurs one cycle before
; next opcode is fetched.
;Add 3 cycle delay, using
; BRN with dummy branch
; to same instruction.
;Test state of comp 2 flag
; at 1/2 of the software
; counter's bit time.
;Carry remains clear if
; CPF2 tests as being clear.
;Increment ACCA. Carry is
; cleared unless there is
; a carry from the add
; operation itself
;Add 4 cycle delay, using
; (2) NOP instructions
;If accum. count reaches
; maximum, then carry will
; be set. If carry is clear
; then A/D loop count should
; continue, else continue on
; to process fault, with
; carry bit set and ACCA
; left equal to $00.
;Fix fault, over time limit
;Set CPFR2 to clear CPF2
Manual A/D Conversions
Application Note
63
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