AN1740 Freescale Semiconductor / Motorola, AN1740 Datasheet - Page 30
AN1740
Manufacturer Part Number
AN1740
Description
Applications Using the Analog Subsystem on MC68HC05JJ/JP Series Microcontrollers
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
1.AN1740.pdf
(80 pages)
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Application Note
Comparator
Input Bus
30
problem, it is recommended to avoid changing more than one MUX bit
on a given write cycle to the AMUX register.
The channel multiplexers are always tied to the port pins regardless of
the programming of pin pulldowns or the digital interface. Therefore, the
channel multiplexers can monitor inputs to the digital interface. Similarly,
the digital interface can feed outputs to the channel multiplexers, if
desired.
One end of the comparator input bus connects to the negative input of
comparator 2. The other end of the comparator input bus can connect
directly to the channel select bus, through a divider to the channel select
bus or to the internal temperature sensing diode. A sample capacitor of
approximately 10 pF is always connected to the negative input of
comparator 2 regardless of what source is selected. The reference end
of this sample capacitor is connected either to V
depending on the state of the VOFF bit in the ASR. A block diagram of
the comparator input bus is shown in
The HOLD and DHOLD bits in the AMUX register control the comparator
input bus as given in
set and the comparator input bus connected directly to the channel
select bus. However, this limits input sources to the common mode
range. When performing A/D conversions, the channel select bus needs
to be tied to a reference voltage such as V
conversion. To select V
DHOLD bit instead of HOLD bit. When the divided input is used, the
source could be as high as 2 x V
common mode range of the comparator. However, the input protection
diode on the port B inputs will try to limit the voltage on the pins to V
+ 0.3 volts. Supplying a higher voltage than V
damage this diode and the device. The illogical case of setting both the
HOLD and DHOLD bits does not actually short out the divider, but
selects the temperature diode instead.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Table
DD
, the divided input is needed by selecting the
5. The normal mode is to have the HOLD bit
DD
– 3 volts and still not exceed the
Figure
DD
13.
DD
to make a V
SS
+ 0.3 volts could
or to an offset voltage
REF
MOTOROLA
AN1740
DD
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