LM3S1150-IQC50 Luminary Micro, Inc., LM3S1150-IQC50 Datasheet - Page 235

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LM3S1150-IQC50

Manufacturer Part Number
LM3S1150-IQC50
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet

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Watchdog Raw Interrupt Status (WDTRIS)
Base 0x4000.0000
Offset 0x010
Type RO, reset 0x0000.0000
June 14, 2007
Reset
Reset
Type
Type
Bit/Field
31:1
0
RO
RO
31
15
0
0
Register 5: Watchdog Raw Interrupt Status (WDTRIS), offset 0x010
This register is the raw interrupt status register. Watchdog interrupt events can be monitored via
this register if the controller interrupt is masked.
RO
RO
30
14
0
0
reserved
WDTRIS
Name
RO
RO
29
13
0
0
Luminary Micro Confidential-Advance Product Information
RO
RO
28
12
0
0
RO
RO
Type
27
11
0
0
RO
RO
RO
RO
26
10
0
0
Reset
0
0
RO
RO
25
0
9
0
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Watchdog Raw Interrupt Status
Gives the raw interrupt state (prior to masking) of WDTINTR.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
LM3S1150 Microcontroller
RO
RO
19
0
3
0
RO
RO
18
0
2
0
RO
RO
17
0
1
0
WDTRIS
RO
RO
16
0
0
0
235

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