LM3S1150-IQC50 Luminary Micro, Inc., LM3S1150-IQC50 Datasheet - Page 229

• Manufacturer Part Number: LM3S1150-IQC50
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

11.3
11.4
Table 11-1. Watchdog Timer Register Map
June 14, 2007
Offset
0x00C
0x000
0x004
0x008
0x010
Name
WDTLOAD
WDTVALUE
WDTCTL
WDTICR
WDTRIS
the Watchdog Timer Lock (WDTLOCK) register is written, which prevents the timer configuration
from being inadvertently altered by software.
The Watchdog Timer module generates the first time-out signal when the 32-bit counter reaches
the zero state after being enabled; enabling the counter also enables the watchdog timer interrupt.
After the first time-out event, the 32-bit counter is re-loaded with the value of the Watchdog Timer
Load (WDTLOAD) register, and the timer resumes counting down from that value.
If the timer counts down to its zero state again before the first time-out interrupt is cleared, and the
reset signal has been enabled (via the WatchdogResetEnable function), the Watchdog timer
asserts its reset signal to the system. If the interrupt is cleared before the 32-bit counter reaches its
second time-out, the 32-bit counter is loaded with the value in the WDTLOAD register, and counting
resumes from that value.
If WDTLOAD is written with a new value while the Watchdog Timer counter is counting, then the
counter is loaded with the new value and continues counting.
Writing to WDTLOAD does not clear an active interrupt. An interrupt must be specifically cleared
by writing to the Watchdog Interrupt Clear (WDTICR) register.
The Watchdog module interrupt and reset generation can be enabled or disabled as required. When
the interrupt is re-enabled, the 32-bit counter is preloaded with the load register value and not its
last state.
Initialization and Configuration
To use the WDT, its peripheral clock must be enabled by setting the WDT bit in the RCGC0 register.
The Watchdog Timer is configured using the following sequence:
1.
2.
3.
If software requires that all of the watchdog registers are locked, the Watchdog Timer module can
be fully locked by writing any value to the WDTLOCK register. To unlock the Watchdog Timer, write
a value of 0x1ACCE551.
Register Map
Table 11-1 on page 229 lists the Watchdog registers. The offset listed is a hexadecimal increment
to the register’s address, relative to the Watchdog Timer base address of 0x4000.0000.
Load the WDTLOAD register with the desired timer load value.
If the Watchdog is configured to trigger system resets, set the RESEN bit in the WDTCTL register.
Set the INTEN bit in the WDTCTL register to enable the Watchdog and lock the control register.
Luminary Micro Confidential-Advance Product Information
Type
R/W
R/W
WO
RO
RO
0xFFFF.FFFF
0xFFFF.FFFF
0x0000.0000
0x0000.0000
Reset
-
Description
Watchdog Load
Watchdog Value
Watchdog Control
Watchdog Interrupt Clear
Watchdog Raw Interrupt Status
LM3S1150 Microcontroller
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