IMP16C552-CJ68 IMP Inc, IMP16C552-CJ68 Datasheet - Page 4

• Manufacturer Part Number: IMP16C552-CJ68
• Description: Dual Universal Asynchronous Receiver/Transmitter (UART) with 16-BYTE FIFO & Parallel Printer Port
• Manufacturer: IMP Inc

4
Pin Description
Note: in the following descriptions a low represents a logic 0 and high represents a logic 1
Mnemonic
CSO*,CS1*
CS2*
IOR*
IOW*
CLK
A2,A1,A0
Pin
type
IN
IN
IN
IN
IN
Pin#
32,3,38
37
36
4
33,34
35
description
Chip select pins: when CS0,CS1 and CS2 are low the chip is selected
this enable communication between the device and the CPU cs0 selects
serial channel 0,CS1* selects serial channel 1 and CS2* selects the
parallel port
Read strobe :when IOR* is low while the chip is selected the CPU can
write status information or data from the selected register of
channel 0, serial channel 1,or parallel port
Write strobe : when IOW* is low while the chip is selected the CPU can
write control words or data into the selected register of senal channel
0,serial channel 1,or parallel port
Clock: external clock input
Register Select pins :Address signals connected to these 3 input s
select a register for the CPU to read from or write to during data transfer
A table of registers for serial channel 0,1 parallel port and their
addresses is shown below .Note that the state of the Divisor latch
Access Bit (DLAB)of each channel ,affects the most significant bit of
the line control register of each channel affects the selection of certain
registers the DLAB must be set high by the system software to access
the baud generator Divisor Latches
REGISTER ADDRESSES
Serial channel 0 or1
DLAB A2 A1 A0
0
0
0
x
x
x
x
x
x
x
1
1
Parallel port
x
x
x
x
x
x
x
x
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0 1 0
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0 0 0
0 0 0
0 0 1
0 0 0
0 0 0
0 0 port data register
0 1 port status (read only )
1 0 port control register
1 1 not allowed
Receiver buffer register(read)
Interrupt enable register
Interrupt Identification register(read)
FIFO control register(write)
line control register
MODEM control register
line status register
MODEM status register
Scratch pad register
Divisor latch register (most significant byte)
Transmitter holding register(write)
Divisor latch register (least significant byte)
Register
IMP16C552
IMP16C552
serial
© 2002 IMP, Inc.