HT48CU80 Holtek Semiconductor, HT48CU80 Datasheet - Page 25

• Manufacturer Part Number: HT48CU80
• Description: (HT48RU80 / HT48CU80) I/O Type 8-Bit MCU
• Manufacturer: Holtek Semiconductor

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Rev. 1.00
TXBRK
The TXBRK bit is the Transmit Break Character bit.
When this bit is 0 there are no break characters
and the TX pin operates normally. When the bit is
transmitter will send logic zeros. When equal to 1
after the buffered data has been transmitted, the
transmitter output is held low for a minimum of a
13-bit length and until the TXBRK bit is reset.
STOPS
This bit determines if one or two stop bits are to be
used. When this bit is equal to 1 two stop bits are
used, if the bit is equal to 0 then only one stop bit
is used.
PRT
This is the parity type selection bit. When this bit is
equal to 1 odd parity will be selected, if the bit is
equal to 0 then even parity will be selected.
PREN
This is parity enable bit. When this bit is equal to 1
the parity function will be enabled, if the bit is equal
to 0 then the parity function will be disabled.
BNO
This bit is used to select the data length format,
which can have a choice of either 8-bits or 9-bits. If
this bit is equal to 1 then a 9-bit data length will be
selected, if the bit is equal to 0 then an 8-bit data
length will be selected. If 9-bit data length is se-
lected then bits RX8 and TX8 will be used to store
the 9th bit of the received and transmitted data re-
spectively.
UARTEN
The UARTEN bit is the UART enable bit. When the
bit is 0 the UART will be disabled and the RX and
TX pins will function as General Purpose I/O pins.
When the bit is 1 the UART will be enabled and
the TX and RX pins will function as defined by the
TXEN and RXEN control bits. When the UART is
1 there are transmit break characters and the
25
UCR2 register
The UCR2 register is the second of the two UART
control registers and serves several purposes. One of
its main functions is to control the basic enable/dis-
able operation of the UART Transmitter and Receiver
as well as enabling the various UART interrupt
sources. The register also serves to control the baud
rate speed, receiver wake-up enable and the address
detect enable.
Further explanation on each of the bits is given below:
disabled it will empty the buffer so any character re-
maining in the buffer will be discarded. In addition,
the baud rate counter value will be reset. When the
UART is disabled, all error and status flags will be
reset. The TXEN, RXEN, TXBRK, RXIF, OERR,
FERR, PERR, and NF bits will be cleared, while the
TIDLE, TXIF and RIDLE bits will be set. Other con-
trol bits in UCR1, UCR2, and BRG registers will re-
main unaffected. If the UART is active and the
UARTEN bit is cleared, all pending transmissions
and receptions will be terminated and the module
will be reset as defined above. When the UART is
re-enabled it will restart in the same configuration.
This bit enables or disables the transmitter empty
interrupt. If this bit is equal to 1 when the transmit-
ter empty TXIF flag is set, due to a transmitter
empty condition, the UART interrupt request flag
will be set. If this bit is equal to 0 the UART inter-
rupt request flag will not be influenced by the condi-
tion of the TXIF flag.
This bit enables or disables the transmitter idle in-
terrupt. If this bit is equal to 1 when the transmitter
idle TIDLE flag is set, the UART interrupt request
flag will be set. If this bit is equal to 0 the UART in-
terrupt request flag will not be influenced by the
condition of the TIDLE flag.
TEIE
TIIE
HT48RU80/HT48CU80
April 12, 2006