HT48CU80 Holtek Semiconductor, HT48CU80 Datasheet - Page 20

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HT48CU80

Manufacturer Part Number
HT48CU80
Description
(HT48RU80 / HT48CU80) I/O Type 8-Bit MCU
Manufacturer
Holtek Semiconductor
Datasheet
www.DataSheet4U.com
Input/Output Ports
There are 56 bidirectional input/output lines in the
microcontroller, labeled from PA to PG, which are
mapped to the data memory of [12H], [14H], [16H],
[18H], [1AH], [1CH] and [25H] respectively. All of these
I/O ports can be used for input and output operations.
For input operation, these ports are non-latching, that is,
the inputs must be ready at the T2 rising edge of
instruction MOV A,[m] (m=12H, 14H, 16H, 18H, 1AH,
1CH or 25H). For output operation, all the data is latched
and remains unchanged until the output latch is rewrit-
ten.
Each I/O line has its own control register (PAC, PBC,
PCC, PDC, PEC, PFC, PGC) to control the input/output
configuration. With this control register, CMOS output or
Schmitt trigger input with or without pull-high resistor
structures can be reconfigured dynamically under soft-
ware control. To function as an input, the corresponding
latch of the control register must write 1 . The input
source also depends on the control register. If the con-
trol register bit is 1 , the input will read the pad state. If
the control register bit is 0 , the contents of the latches
will move to the internal bus. The latter is possible in the
Rev. 1.00
read-modify-write instruction.
PA, PB, PC2~PC7, PD, PE, PF, PG Input/Output Ports
20
For output function, CMOS is the only configuration.
These control registers are mapped to locations 13H,
15H, 17H, 19H, 1BH, 1DH and 26H.
After a chip reset, these input/output lines remain at high
levels or floating state (depending on the pull-high op-
tions). Each bit of these input/output latches can be set
or cleared by SET [m].i and CLR [m].i (m=12H, 14H,
16H, 18H, 1AH, 1CH or 25H) instructions.
Some instructions first input data and then follow the
output operations. For example, SET [m].i , CLR
[m].i , CPL [m] , CPLA [m] read the entire port states
into the CPU, execute the defined operations
(bit-operation), and then write the results back to the
latches or the accumulator.
Each line of Port A has the capability of waking-up the
device.
There is a pull-high option available for all I/O lines (port
option). Once the pull-high option of an I/O line is se-
lected, the I/O line has a pull-high resistor. Otherwise,
the pull-high resistor is absent. It should be noted that a
non-pull-high I/O line operating in input mode will cause
a floating state.
HT48RU80/HT48CU80
April 12, 2006

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