IDT72V36110 Integrated Device Technology, IDT72V36110 Datasheet - Page 31

• Manufacturer Part Number: IDT72V36110
• Description: 128k X 36 Supersync Ii Fifo, 3.3v
• Manufacturer: Integrated Device Technology

NOTES:
1. Retransmit setup is complete after EF returns HIGH, only then can a read operation begin.
2. OE = LOW.
3. W
4. No more than D - 2 may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, FF will be HIGH throughout the Retransmit setup procedure.
5. There must be at least two words written to the FIFO before a Retransmit operation can be invoked.
6. RM is set HIGH during MRS.
IDT72V36100/72V36110 3.3V HIGH DENSITY SUPERSYNC II
65,536 x 36 and 131,072 x 36
Q
WCLK
0
D = 65,536 for the IDT72V36100 and 131,072 for the IDT72V36110.
RCLK
WEN
REN
1
PAE
- Q
PAF
= first word written to the FIFO after Master Reset, W
HF
EF
RT
n
t
ENS
W
x
t
t
A
ENH
t
ENS
t
RTS
t
RTS
Figure 11. Retransmit Timing (IDT Standard Mode)
2
= second word written to the FIFO after Master Reset.
t
t
t
ENH
REF
HF
t
SKEW2
1
TM
36-BIT FIFO
W
x+1
31
2
t
PAFS
1
t
REF
t
ENS
2
t
t
A
PAES
COMMERCIAL AND INDUSTRIAL
W
TEMPERATURE RANGES
1
(3)
APRIL 6, 2006
6117 drw16
t
t
ENH
A
W
2
(3)