MT90812 Mitel Networks Corporation, MT90812 Datasheet - Page 73
MT90812
Manufacturer Part Number
MT90812
Description
Integrated Digital Switch (IDX)
Manufacturer
Mitel Networks Corporation
Datasheet
1.MT90812.pdf
(105 pages)
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Advance Information
A system write to the TX FIFO buffer is performed by addressing location 44
Up to 32 bytes can be written to the FIFO. The length of the message is determined by the number of bytes
written to the FIFO. If N-bytes are written to this location and the ST bit in the D-Channel Receive Interrupt
Threshold (DRXIT)is set, the message transmitted will be N-bytes long. Refer to “Transmitter Operation” on
page 33.
22.26 D-Channel TX Control (DTXC)
The register is configured as follows:
The Transmitter Bit Order (TXBO) bit resides in the DRXC register described in Section 22.21.
Read/Write Address is: 45
Reset Value is: 00
5-4
Bit
7
6
3
2
1
0
W1-W0
Name
PE
SE
ST
IS
IL
M
H
TX FIFO Interrupt Select. When DTXE=1 and IS=0 then when the TX FIFO is empty
or 3/4 empty (as selected by IL bit) an interrupt is generated.When DTXE=1 and IS=1
then an interrupt is generated when the transmission has ended.
Interrupt Level. 0 = interrupt generated when the TX FIFO is empty.
1= interrupt generated when the TX FIFO is 3/4 empty, when there are 8 bytes
remaining.
TX Data Rate
00 = 1 bit per frame
01 = 2 bits per frame
10= 8 bits per frame
1 = Message Length Interrupt Mode, i.e. Message oriented, or Message oriented
with parity.
0 = FIFO Level Interrupt Mode, i.e. Unframed, Byte oriented, or Byte oriented with
parity.
Parity Enable. If 0 disable Parity bit. if PE =1 then enable Parity Bit. In FLI mode parity
can be enabled only if the start and stop bits are used, i.e. S=1.
Start and Stop bit Enable. In FLI mode, if 0 transmit message without including start,
parity and stop bits.
If 1 transmit message with start and stop bits; also transmit parity according to PE bit.
In MLI mode start and stop bits are always used.
Start Transmitter. ST=1 starts transmission of the message following a write to the
TX FIFO. ST=0 clears the FIFO and resets its pointers.
H
IS
7
6
IL
W1
5
W0
4
3
M
Description
PE
2
SE
1
ST
0
HEX
of the Control Register page.
MT90812
69
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