MT90812 Mitel Networks Corporation, MT90812 Datasheet - Page 72

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MT90812

Manufacturer Part Number
MT90812
Description
Integrated Digital Switch (IDX)
Manufacturer
Mitel Networks Corporation
Datasheet

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MT90812
22.23 D-Channel BR Status (DRXS)
The register is configured as follows:
22.24 D-Channel RX FIFO Output (DRXOUT)
The register is configured as follows:
The receiver transfers incoming data for a specified channel to the RX FIFO. The D-Channel RX channel is
identified in address 70
transferred to the RX FIFO buffer. A read of control register D-Channel RX FIFO Output (DRXOUT) at 43
accesses the next data byte in the RX FIFO buffer.
22.25 D-Channel TX FIFO Input (DTXIN)
The register is configured as follows:
68
Read Address is: 42
Reset Value is: 00
Read Address is: 43
Write Address is: 44
7-3
7-0
7-0
Bit
Bit
Bit
2
1
0
Name
D7-D0
D7-D0
Name
Name
OE
PE
SE
-
H
H
H
H
HEX
Unused.
RX Overrun Error. Gets set when writing to a full FIFO.
RX Parity Error.
RX Stop bit Error.
Next data byte in the RX FIFO buffer. D7 is the MSB.
TX FIFO buffer. D7 is the MSB.
of Connect Memory Low (refer to Section 5.3). The data in this channel is
D7
7
D7
-
7
7
D6
6
D6
-
6
6
D5
5
D5
-
5
5
D4
4
4
D4
-
4
D3
3
D3
3
-
3
Description
D2
Description
Description
2
D2
2
OV
2
D1
1
D1
1
PE
1
D0
0
D0
0
SE
0
Advance Information
HEX

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