MT58V512V36D Micron Technology, MT58V512V36D Datasheet - Page 26

• Manufacturer Part Number: MT58V512V36D
• Description: (MT58xxxx) 16Mb SYNCBURST SRAM
• Manufacturer: Micron Technology

BYPASS
struction register and the TAP is placed in a Shift-DR
state, the bypass register is placed between TDI and TDO.
The advantage of the BYPASS instruction is that it
shortens the boundary scan path when multiple devices
are connected together on a board.
TAP AC ELECTRICAL CHARACTERISTICS
(Notes 1, 2) (+20ºC T
NOTE: 1.
16Mb: 1 Meg x 18, 512K x 32/36 Pipelined, DCD SyncBurst SRAM
MT58L1MY18D_2.p65 – Rev 7/00
DESCRIPTION
Clock
Clock cycle time
Clock frequency
Clock HIGH time
Clock LOW time
Output Times
TCK LOW to TDO unknown
TCK LOW to TDO valid
TDI valid to TCK HIGH
TCK HIGH to TDI invalid
Setup Times
TMS setup
Capture setup
Hold Times
TMS hold
Capture hold
When the BYPASS instruction is loaded in the in-
2. Test conditions are specified using the load in Figure 7.
t
CS and
t
CH refer to the setup and hold time requirements of latching data from the boundary scan register.
Test Mode Select
J
Test Data-Out
Test Data-In
+100ºC; +2.4V V
Test Clock
(TDO)
(TMS)
(TCK)
(TDI)
1
DD
t MVTH
t DVTH
+2.6V)
TAP TIMING
2
t THTL
t THMX
t THDX
26
t
PIPELINED, DCD SYNCBURST SRAM
TLTH
RESERVED
served for future use. Do not use these instructions.
16Mb: 1 MEG x 18, 512K x 32/36
3
These instruction are not implemented but are re-
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t THTH
DON’T CARE
4
t TLOX
SYMBOL
t TLOV
t
t
t
t
t
t
t
t
t
MVTH
THMX
THTH
DVTH
THDX
TLOX
TLOV
THTL
TLTH
t
t
f
CH
TF
CS
5
UNDEFINED
MIN
100
40
40
10
10
10
10
10
10
0
6
MAX
©2000, Micron Technology, Inc.
10
20
ADVANCE
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns