MT29F128G08WAAC6 Micron, MT29F128G08WAAC6 Datasheet - Page 70
MT29F128G08WAAC6
Manufacturer Part Number
MT29F128G08WAAC6
Description
NAND Flash Memory
Manufacturer
Micron
Datasheet
1.MT29F128G08WAAC6.pdf
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Interleaved TWO-PLANE PAGE READ Operation
PDF: 09005aef8278ee3f / Source: 09005aef81f17540
16gb_nand_mlc_l52a__2.fm -Rev. D 5/08 EN
Figure 45 on page 71 shows how to perform interleaved TWO-PLANE PAGE READ opera-
tions. In Figure 45, the TWO-PLANE/MULITPLE DIE READ STATUS (78h) command is
used to monitor the status register for operation completion.
The interleaved TWO-PLANE PAGE READ operation must meet two-plane addressing
requirements. See “Two-Plane Addressing” on page 55 for details.
RANDOM DATA OUTPUT (05h-E0h) is permitted during interleaved TWO-PLANE PAGE
READ operations to change the column address within a plane. TWO-PLANE RANDOM
DATA OUTPUT (06h-E0h) is permitted during interleaved TWO-PLANE PAGE READ
operations to change planes and column addresses between the planes.
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70
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16, 32, 64, 128Gb NAND Flash Memory
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Command Definitions
©2005 Micron Technology, Inc. All rights reserved.
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