MT29F128G08WAAC6 Micron, MT29F128G08WAAC6 Datasheet - Page 55

• Manufacturer Part Number: MT29F128G08WAAC6
• Description: NAND Flash Memory
• Manufacturer: Micron

TWO-PLANE Operations
Two-Plane Addressing
TWO-PLANE PAGE READ 00h-00h-30h
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16gb_nand_mlc_l52a__2.fm -Rev. D 5/08 EN
This NAND Flash device is divided into two physical planes. Each plane contains a
4,314-byte data register, a 4,314-byte cache register, and a 2,048-block Flash array. Two-
plane commands make better use of the flash arrays on these physical planes by per-
forming PROGRAM, READ, or ERASE operations simultaneously, significantly improving
system performance.
Two-plane commands require two addresses, one address per plane. These two
addresses are subject to the following requirements:
• The least significant block address bit, BA7, must be different for both addresses.
• The most significant block address bit, BA19, for 64Gb and 128Gb devices must be
• The page address bits, PA[6:0], must be identical for both addresses.
The TWO-PLANE PAGE READ (00h-00h-30h) operation is similar to the PAGE READ
(00h-30h) operation. It transfers two pages of data from the Flash array to the data regis-
ters. Each page must be from a different plane on the same die.
To enter the TWO-PLANE PAGE READ mode, write the 00h command to the command
register, then write 5 ADDRESS cycles for plane 0 (BA7 = 0). Next, write the 00h com-
mand to the command register, then write 5 ADDRESS cycles for plane 1 (BA7 = 1).
Finally, issue the 30h command. The first-plane and second-plane addresses must meet
the two-plane addressing requirements, and, in addition, they must have identical col-
umn addresses.
After the 30h command is written, page data is transferred from both planes to their
respective data registers in tR. During these transfers, R/B# goes LOW. When the trans-
fers are complete, R/B# returns HIGH. To read out the data from the plane 0 data regis-
ter, pulse RE# repeatedly. After the DATA cycle from the plane 0 address completes, issue
a TWO-PLANE RANDOM DATA READ (06h-E0h) command to select the plane 1 address,
then repeatedly pulse RE# to read out the data from the plane 1 data register.
Alternatively, the READ STATUS (70h) command can monitor the data transfers. When
the transfers are complete, status register bit 6 is set to “1.” To read data from one of the
two planes, the user must first issue the TWO-PLANE RANDOM DATA READ (06h-E0h)
command followed by 5 ADDRESS cycles (see “TWO-PLANE RANDOM DATA READ 06h-
E0h” on page 56). To read out data from the plane and column address specified with the
TWO-PLANE RANDOM DATA READ command, pulse RE# repeatedly. When the DATA
cycle is complete, issue a TWO-PLANE RANDOM DATA READ (06h-E0h) command to
select the other plane. To output the data beginning at the specified column address,
pulse RE# repeatedly.
Use of the TWO-PLANE/MULTIPLE-DIE READ STATUS (78h) command is supported
during and following a TWO-PLANE PAGE READ operation. The same die to which the
TWO-PLANE PAGE READ command was issued must remain selected when data is read
out from the NAND Flash device. Otherwise, the data read out will be invalid data for the
TWO-PLANE PAGE READ command issued. A die can be selected by issuing a TWO-
PLANE/MULTIPLE-DIE READ STATUS (78h) command to any valid address location on
a die.
identical for both addresses.
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16, 32, 64, 128Gb NAND Flash Memory
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Command Definitions
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