MT29F128G08WAAC6 Micron, MT29F128G08WAAC6 Datasheet - Page 15

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MT29F128G08WAAC6

Manufacturer Part Number
MT29F128G08WAAC6
Description
NAND Flash Memory
Manufacturer
Micron
Datasheet
Array Organization
Figure 8:
Table 3:
PDF: 09005aef8278ee3f / Source: 09005aef81f17540
16gb_nand_mlc_l52a__2.fm -Rev. D 5/08 EN
Cycle
First
Second
Third
Fourth
Fifth
Cache Register
Data Register
2,048 blocks
4,096 blocks
per device
per plane
Array Addressing: 16Gb and 32Gb x8
Array Organization for 16Gb and 32Gb x8
(0, 2, 4, 6, ..., 4,092, 4,094)
BA15
BA7
LOW
LOW
I/O7
CA7
even-numbered blocks
3
Notes: 1. For the 32Gb MT29F32G08Q and MT29F32G08R devices, the 16Gb array organization
Notes: 1. Block address concatenated with page address = actual page address. CAx = column
Plane of
4,096
4,096
1 block
2. Column address 4,313 (10D9h) is the maximum valid column address.
3. Plane select bit:
BA14
LOW
LOW
I/O6
CA6
PA6
shown here applies to each chip enable (CE# and CE2#).
address; PAx = page address; BAx = block address.
0 = plane of even-numbered blocks
1 = plane of odd-numbered blocks
4,314 bytes
218
218
Micron Confidential and Proprietary
BA13
LOW
LOW
(1, 3, 5, 7, ..., 4,093, 4,095)
I/O5
CA5
PA5
odd-numbered blocks
4,096
4,096
1 block
Plane of
4,314 bytes
CA12
BA12
LOW
I/O4
CA4
PA4
15
www.DataSheet.net/
218
218
16, 32, 64, 128Gb NAND Flash Memory
Micron Technology, Inc., reserves the right to change products or specifications without notice.
BA11
CA11
LOW
I/O3
CA3
PA3
1 page = (4K + 218 bytes)
1 block = (4K + 218) bytes x 128 pages
1 plane = (512K + 27K) bytes x 2,048 blocks
1 device = 8,624Mb x 2 planes
I/O0
I/O7
= (512K + 27K) bytes
= 8,624Mb
= 17,248Mb
CA10
BA10
BA18
I/O2
CA2
PA2
©2005 Micron Technology, Inc. All rights reserved.
Array Organization
BA17
I/O1
CA1
CA9
BA9
PA1
BA16
I/O0
CA0
CA8
BA8
PA0
Datasheet pdf - http://www.DataSheet4U.co.kr/

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