MT57V1MH18A Micron Semiconductor Products, Inc., MT57V1MH18A Datasheet - Page 5

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MT57V1MH18A

Manufacturer Part Number
MT57V1MH18A
Description
18Mb DDR SRAM, 2.5V Vdd, Hstl, 2-Word Burst,
Manufacturer
Micron Semiconductor Products, Inc.
Datasheet

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NOTE:
18Mb: 2.5V V
MT57V1MH18A_16_F.fm – Rev. F, Pub. 3/03
1. Consult Micron Technical Notes for more thorough discussions of clocking schemes.
2. Data capture is possible using only one of the two signals. CQ and CQ# clocks are optional use outputs.
3. For high frequency applications (200 MHz and faster) the CQ and CQ# clocks (for data capture) are recommended
MASTER
ASIC)
over the C and C# clocks (for data alignment). The C and C# clocks are optional use inputs.
(CPU
BUS
or
DD
, HSTL, Pipelined DDRb2 SRAM
SRAM 1 Input CQ#
SRAM 2 Input CQ#
SRAM 1 Input CQ
SRAM 2 Input CQ
Cycle Start#
Delayed K#
Delayed K
Source K#
Source K
Address
R/W#
DQ
R
R = 50Ω
DQ
SA
Figure 3: Application Example
LD#
Vt = V
SRAM 1
R/W#
REF
C C#
2.5V V
K
CQ#
ZQ
CQ
K#
R = 250Ω
5
DD
, HSTL, PIPELINED DDRb2 SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DQ
SA
R
LD#
SRAM 2
Vt
Vt
R/W#
1 MEG x 18, 512 x 36
C C#
K
CQ#
ZQ
CQ
K#
R = 250Ω
©2003 Micron Technology Inc.

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