MT18LD1672 Micron Semiconductor Products, Inc., MT18LD1672 Datasheet

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MT18LD1672

Manufacturer Part Number
MT18LD1672
Description
168-Pin DRAM Dimms, Buffered, (x72), , Status: End of Life (EOL)
Manufacturer
Micron Semiconductor Products, Inc.
Datasheet
1.MT18LD1672.pdf (28 pages)
DRAM
MODULE
FEATURES
• JEDEC-standard ECC pinout in a 168-pin, dual in-
• 64MB (8 Meg x 72), 128MB (16 Meg x 72), and
• High-performance CMOS silicon-gate process
• Single +3.3V ±0.3V power supply
• All inputs, outputs, and clocks are LVTTL-compatible
• All inputs are buffered except RAS#
• 4,096-cycle CAS#-BEFORE-RAS# (CBR) refresh
• Extended Data-Out (EDO) PAGE MODE access cycle
OPTIONS
• Components
• Package
• Refresh Addressing
• Module Height
• Timing
• Access Cycle
KEY TIMING PARAMETERS
8, 16, 32 Meg x 72 Buffered DRAM DIMMs
DM77_2.p65 – Rev. 3/00
SPEED
line memory module (DIMM)
256MB (32 Meg x 72)
distributed across 64ms
SOJ
TSOP
168-pin DIMM (gold)
4,096 (4K) rows
8,192 (8K) rows
Low profile, 1.65" (256MB only)
Low profile, 1.25" (128MB only)
50ns access
60ns access
EDO PAGE MODE
-5
-6
104ns
84ns
t
RC
Front View (128MB)
t
50ns
60ns
RAC
168-PIN DIMM
20ns
25ns
t
PC
30ns
35ns
t
AA
t
18ns
20ns
CAC
MARKING
Blank
DT
-5
-6
D
G
C
D
X
F
t
10ns
CAS
8ns
1
MT9LD(T)872(F)X, MT18LD(T)1672(F)(D)X,
MT36LD(T)3272(C)(F)X
For the latest data sheet, please refer to the Micron Web site:
www.micronsemi.com/datasheets/datasheet.html
NOTE: Pin symbols in parentheses are not used on these
*256MB version only
PIN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
1
2
3
4
5
6
7
8
9
Micron Technology, Inc., reserves the right to change products or specifications without notice.
SYMBOL
modules but may be used for other modules in this
product family. They are for reference only.
CAS0#
RAS0#
WE0#
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
OE0#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
RFU
A10
A12
RFU
RFU
V
V
V
V
V
V
V
NC
NC
V
A0
A2
A4
A6
A8
DD
DD
DD
DD
SS
SS
SS
SS
BUFFERED DRAM DIMMs
PIN
PIN ASSIGNMENT
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
SYMBOL
RAS2#
CAS4#
WE2#
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
OE2#
RFU
V
V
RFU
RFU
RFU
RFU
V
PD1
PD3
PD5
PD7
V
ID0
V
NC
NC
V
V
V
8, 16, 32 MEG x 72
DD
DD
DD
DD
SS
SS
SS
SS
PIN
100
101
102
103
104
105
106
107
108
109
110
111
112 NC/CAS1#*
113
114 NC/RAS1#*
115
116
117
118
119
120
121
122
123
124
125
126
85
86
87
88
89
90
91
92
93
96
98
99
94
95
97
SYMBOL
NC (A13)
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
RFU
RFU
RFU
A11
RFU
V
V
V
V
V
V
V
NC
NC
V
A1
A3
A5
A7
A9
B0
DD
DD
DD
DD
SS
SS
SS
SS
©2000, Micron Technology, Inc.
PIN
127
128
129 NC/RAS3#*
130 NC/CAS5#*
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
SYMBOL
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQ64
DQ65
DQ66
DQ67
DQ68
DQ69
DQ70
DQ71
PDE#
PD2
PD4
PD6
PD8
RFU
RFU
V
V
RFU
RFU
RFU
RFU
V
V
ID1
V
NC
NC
V
V
V
DD
DD
DD
DD
SS
SS
SS
SS

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MT18LD1672 Summary of contents

Page 1

... Front View (128MB) 168-PIN DIMM 8, 16, 32 Meg x 72 Buffered DRAM DIMMs DM77_2.p65 – Rev. 3/00 MT9LD(T)872(F)X, MT18LD(T)1672(F)(D)X, MT36LD(T)3272(C)(F)X For the latest data sheet, please refer to the Micron Web site: www.micronsemi.com/datasheets/datasheet.html PIN MARKING ...

Page 2

... MT9LD872FG Meg x 72 ECC MT9LDT872FG Meg x 72 ECC MT18LD1672G Meg x 72 ECC MT18LDT1672G Meg x 72 ECC MT18LD1672FG Meg x 72 ECC MT18LDT1672FG Meg x 72 ECC MT18LDT1672FDG Meg x 72 ECC MT36LD3272G Meg x 72 ECC MT36LDT3272G-x X ...

Page 3

DQ0-DQ7 DQ0-DQ7 WE0# WE OE0# OE# D RAS0# RAS# CAS0# CAS# A1–A11 D A11 A12- DQ40-DQ47 DQ0-DQ7 WE2# WE OE2# OE# D RAS2# RAS# CAS4# CAS# A1–A11 D ...

Page 4

DQ0-DQ3 DQ4-DQ7 DQ0-DQ3 DQ0-DQ3 WE0# WE# WE OE0# OE# OE# D RAS0# RAS# RAS# A1–A11 A1–A11 CAS0# CAS# CAS# D A11 A12- DQ36-DQ39 DQ40-DQ43 DQ0-DQ3 DQ0-DQ3 WE2# ...

Page 5

DQ0-DQ3 DQ0-DQ3 WE0# WE OE0# OE# D RAS0# RAS# CAS0# CAS# A1–A11 D 11 A11 A11- DQ36-DQ39 DQ0-DQ3 WE2# D WE# U9 OE2# D OE# RAS2# RAS# CAS4# D CAS# ...

Page 6

PIN DESCRIPTIONS PIN NUMBERS SYMBOL 30, 45, 114, 129 RAS0#-RAS3# 28, 46, 112, 130 CAS0#, CAS1#, Buffered Input Column-Address Strobe: CAS# is used to clock in the CAS4#, CAS5# 27, 48 WE0#, WE2# 31, 44 OE0#, OE2# 33-39, 117-122, 126 ...

Page 7

PRESENCE-DETECT TRUTH TABLE CHARACTERISTICS Module Module Density Organization 0MB No module installed 8MB 1 Meg x 64/72 8MB 1 Meg x 64/72 16MB 2 Meg x 64/72 16MB 2 Meg x 64/72 32MB 4 Meg x 64/72 32MB 4 Meg ...

Page 8

ABSOLUTE MAXIMUM RATINGS* Voltage on V Pin Relative Voltage on Inputs or I/O Pins Relative to V ....................................... -1V to +4.6V SS Operating Temperature, T (ambient) ... 0°C to +70°C A Storage Temperature (plastic) ............ -55°C to ...

Page 9

I OPERATING CONDITIONS AND MAXIMUM LIMITS DD (Notes: 1- +3.3V ±0.3V) DD PARAMETER/CONDITION STANDBY CURRENT: TTL (RAS# = CAS STANDBY CURRENT: CMOS (RAS# = CAS 0.2V) DD OPERATING CURRENT: Random READ/WRITE ...

Page 10

CAPACITANCE PARAMETER Input Capacitance: A0-A12, B0, WE0#, WE2#, OE0#, OE2# Input Capacitance: CAS0#, CAS1#, CAS4#, CAS5#, PDE# Input Capacitance: RAS0#-RAS3# Input/Output Capacitance: DQ0-DQ71 Output Capacitance: PD1-PD8 NOTE: This parameter is sampled 16, 32 Meg x 72 Buffered DRAM ...

Page 11

EDO PAGE MODE AC ELECTRICAL CHARACTERISTICS (Notes 10, 11, 12, 31; notes appear on next page and page 13 CHARACTERISTICS PARAMETER Access time from column address Column-address setup to CAS# going HIGH during ...

Page 12

EDO PAGE MODE AC ELECTRICAL CHARACTERISTICS (Notes: 1-8; notes appear below and on next page CHARACTERISTICS PARAMETER READ command hold time (referenced to CAS#) READ command setup time Refresh period RAS# precharge time RAS# to CAS# precharge time ...

Page 13

NOTES: (continued) 19. t OFF (MAX) defines the time at which the output achieves the open circuit condition and is not referenced 20. A +2ns (MIN) and a +5ns (MAX) timing skew from the DRAM ...

Page 14

V IH RAS CRP V CAS ASR V IH ROW ADDR WE OE TIMING PARAMETERS -5 SYMBOL MIN ...

Page 15

V IH RAS CRP CAS ASR V IH ADDR ROW IOH DQ V IOL TIMING PARAMETERS -5 SYMBOL MIN ...

Page 16

V IH RAS CSH t CRP V CAS RAD t ASR t RAH V IH ADDR ROW WE OPEN OE# ...

Page 17

EDO-PAGE-MODE EARLY WRITE CYCLE V IH RAS CSH t CRP V IH CAS RAD t ASR t RAH V IH ADDR ROW WCS ...

Page 18

WRITE and READ-MODIFY-WRITE cycles RAS CRP V IH CAS ASR V IH ADDR ROW WE IOH DQ V IOL ...

Page 19

WRITE and READ-MODIFY-WRITE cycles RAS CRP V IH CAS RAD t ASR t RAH V IH ADDR ROW WE RAC V IOH ...

Page 20

EDO-PAGE-MODE READ EARLY WRITE CYCLE V IH RAS CRP t RCD V IH CAS RAD t ASR t RAH V IH ADDR ROW WE IOH DQ OPEN ...

Page 21

V IH RAS CRP V CAS ASR V IH ROW ADDR WE OE TIMING PARAMETERS -5 SYMBOL MIN ...

Page 22

V IH RAS CRP V IH CAS ASR V IH ADDR WE RAS RPC t CP ...

Page 23

V IH RAS CRP V IH CAS ASR t RAH V IH ADDR ROW IOH DQ V IOL TIMING PARAMETERS -5 SYMBOL MIN MAX ...

Page 24

R (2X) .118 (3.00) (2X) .118 (3.00) TYP .250 (6.35) TYP .118 (3.00) TYP 2.625 (66.68) PIN 1 (PIN 85 ON BACKSIDE) .079 (2.00) R (2X) .118 (3.00) (2X) .118 (3.00) TYP .250 (6.35) TYP .118 (3.00) TYP ...

Page 25

R (2X) .118 (3.00) (2X) .118 (3.00) TYP .250 (6.35) TYP .118 (3.00) TYP 2.625 (66.68) PIN 1 (PIN 85 ON BACKSIDE) .079 (2.00) R (2X) .118 (3.00) (2X) .118 (3.00) TYP .250 (6.35) TYP .118 (3.00) TYP ...

Page 26

R (2X) .118 (3.00) (2X) .118 (3.00) TYP .250 (6.35) TYP .118 (3.00) TYP 2.625 (66.68) PIN 1 (PIN 85 ON BACKSIDE) NOTE: All dimensions in inches (millimeters) MAX or typical where noted. 8, 16, 32 Meg x ...

Page 27

R (2X) .118 (3.00) (2X) .118 (3.00) TYP .250 (6.35) TYP .118 (3.00) TYP 2.625 (66.68) PIN 1 (PIN 85 ON BACKSIDE) .079 (2.00) R (2X) .118 (3.00) (2X) .118 (3.00) TYP .250 (6.35) TYP .118 (3.00) TYP ...

Page 28

R (2X) .870 (22.10) MIN .118 (3.00) (2X) .118 (3.00) TYP .118 (3.00) TYP PIN 1 (PIN 85 ON BACKSIDE) NOTE: All dimensions in inches (millimeters) MAX or typical where noted. 8000 S. Federal Way, P.O. Box 6, ...

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