W90220F Winbond Electronics Corp America, W90220F Datasheet - Page 66

• Manufacturer Part Number: W90220F
• Description: Pa-risc Embedded Controller
• Manufacturer: Winbond Electronics Corp America

The above information is the exclusive intellectual property of Winbond Electroncs Corp. and shall not be dsiclosed or distributed or reproduced without permission from
Winbond.
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Bits 5
Bits 6
Bits 7
Whenever either of MSR[4:7] is set to logic 1, a Modem Status Interrupt is generated if IER[4]=1.
Writing LSR is a null operation (not suggested).
Time Out Register (TOR)
Port address : 0xf00003ff (COM1)
Bits 0
Bits 1-7 Time-Out (interrupt) comparator
TOUT_en
0
Tailing edge of RI
DSR# state change
CTS# state change
Time-Out (interrupt) enable
The feature of Receiver Time-Out (interrupt) is enable only when TOR[0] = IER[7] = 1.
The Time-Out counter is reset and start counting (the counting clock = baud rate) whenever
the RX FIFO receives a new data word. Once the content of Time-Out counter (TOUT_cnt)
is equal to that of Time-Out comparator (TOUT_cmp), a Receiver Time-Out interrupt Irpt_
TOUT) is generated if TOR[0] = IER[7] = 1.
This bit is set whenever DCD# input has changed state, and it will be reset if the CPU reads
the MSR.
This bit is set whenever TI# input has changed from high to low, and it will be reset if the
CPU reads the MSR.
This bit is set whenever DSR# input has changed state, and it will be reset if the CPU reads
the MSR.
This bit is set whenever CTS# input has changed state, and it will be reset if the CPU reads
the MSR.
0xf00002ff (COM2)
1
2
3
Read/Write
TOUT_cmp
4
Power-on Default : 0x0
5
6
7
W90220F
Version 0.84