W90220F Winbond Electronics Corp America, W90220F Datasheet - Page 62

• Manufacturer Part Number: W90220F
• Description: Pa-risc Embedded Controller
• Manufacturer: Winbond Electronics Corp America

The above information is the exclusive intellectual property of Winbond Electroncs Corp. and shall not be dsiclosed or distributed or reproduced without permission from
Winbond.
62
Line Control Register (LCR)
Port address : 0xf00003fb (COM1)
Bits 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
DLAB
0
Divisor Latch Access Bit
Break Control Bit
When this bit is set to a logic 1, the serial data output (SOUT) is forced to the Spacing State
(logic 0). This bit affects SOUT only and has no effect on the transmitter logic.
Stick Parity Enable
This bit has effects only when bit-4 (Parity Bit Enable) is set.
Even Parity Enable
This bit has effects only when bit-4 (Parity Bit Enable) is set.
Parity Bit Enable
Number of "Stop bit"
0 = "2F8/3F8" and "2F9/3F9" are used to access RBR, THR or IER.
1 = "2F8/3F8" and "2F9/3F9" are used to access Divisor Latch Registers (DLL, DLM).
0 = Disable Stick Parity
1 = The parity bit is transmitted and checked as a logic 1 if bit-3=0 (odd parity), or
0 = Odd number of logic 1s is transmitted or checked in the data word bits and parity bit.
1 = Even number of logic 1s is transmitted or checked in the data word bits and parity bit.
0 = Praity bit is not generated (transmit data) or checked (receive data) during transfer.
1 = Parity bit is generated of checked between the "last data word bit" and "stop bit" of
0 = One "stop bit" is generated in the transmitted data.
1 = One and a half "stop bit" is generated in the transmitted data when 5-bit word length
BREAK
0xf00002fb (COM2)
as a logic 0 if bit-3=1 (even parity).
the serial data.
is selected.
Two "stop bit" is generated when 6-, 7- and 8-bit word length is selected.
1
SPAR
2
EPAR
3
Read/Write
PAR
4
STOP
Power-on Default : 0x0
5
6
WLEN
7
W90220F
Version 0.84