W90220F Winbond Electronics Corp America, W90220F Datasheet - Page 61

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W90220F

Manufacturer Part Number
W90220F
Description
Pa-risc Embedded Controller
Manufacturer
Winbond Electronics Corp America
Datasheet
The above information is the exclusive intellectual property of Winbond Electroncs Corp. and shall not be dsiclosed or distributed or reproduced without permission from
Winbond.
61
FIFO Control Register (FCR)
Port address : 0xf00003fa (COM1)
Bits 0-1 RX FIFO interrupt (Irpt_RDA) trigger level
Bit 4
Bit 5
Bit 6
Bit 7
0
RTH[0:1]
DMA mode select
The DMA function is not implemented in this version.
Reset TX FIFO
Seting this bit will generate 1 OSC cycle reset pulse to reset TX FIFO. The TX FIFO
becomes empty (TX-pointer is cleared to 0) after such reset. This bit is returned to 0
automatically after the reset pulse is generated.
Reset RX FIFO
Seting this bit will generate 1 OSC cycle reset pulse to reset RX FIFO. The RX FIFO
becomes empty (RX-pointer is cleared to 0) after such reset. This bit is returned to 0
automatically after the reset pulse is generated.
FIFO mode enable
The UART0 and UART1 are always operated on FIFO mode. Writing this bit has no
effect while reading this bit always get logical one.
FCR[0:1]
0 0 0 0
0xf00002fa (COM2)
0 0
0 1
1 0
1 1
1
Fourth
Irpt_RDA trigger level (bytes)
2
Reserved
MODEM Status
(Irpt_MOS)
3
01
04
08
14
Write only
DMOD
4
CTS, DSR, DCD bits
chang state or RI bit
changes from high to
low
TXRST
Power-on Default : 0x1
5
RXRST
6
Reading the MSR
FMEN
7
W90220F
Version 0.84

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