nRF24LE1 Nordic VLSI, nRF24LE1 Datasheet - Page 79

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nRF24LE1

Manufacturer Part Number
nRF24LE1
Description
Manufacturer
Nordic VLSI
Datasheet

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nRF24LE1 Preliminary Product Specification
If the FCSN line is kept active after the first data byte is read out the read command can be extended, the
address is auto incremented and data continues to shift out. The internal address counter rolls over when
the highest address is reached, allowing the complete memory to be read in one continuous read com-
mand.
A read back of the flash main block content is only possible if the read disable bit RDISMB in the FSR reg-
ister are not set.
PROGRAM
SPI command PROGRAM, programs the content of the addressed position in the flash main block. It must
be followed by 2 bytes denoting the start address of the write operation, see Figure 34. If bit INFEN in reg-
ister FSR is enabled, the write operation will be conducted from the InfoPage instead.
Before each write operation the write enable latch WEN must be enabled through the WREN SPI com-
mand. It is possible to write up to 1k bytes (two pages) in one PROGRAM command. The first byte can be
anywhere in a page. A byte can not be reprogrammed without erasing the whole sector.
The device automatically returns to flash write disable (WEN=0) after completion of a PROGRAM com-
mand (pin FCSN=1).
ERASE PAGE
SPI command ERASE PAGE erases 1 addressed page (512 bytes) in the flash main block. The command
must be followed by a 1 byte page address (0-31 for pages in the code memory, 32-35 for pages in the
NVM), see Figure 34.
Before each erase operation the write enable latch WEN must be enabled through the WREN SPI com-
mand. The on-chip driven erase sequence is started when the FCSN pin is set high after the ERASE
PAGE command. During the erase sequence all SPI commands are ignored except the RDSR command.
The device automatically returns to flash write disable (WEN=0) after completion of an ERASE PAGE com-
mand sequence
ERASE ALL
SPI command ERASE ALL, erases all pages in flash main block (code space and NVM) and InfoPage. It is
a 1 byte SPI command with no data.
Before the erase operation the write enable latch WEN must be enabled through the WREN SPI com-
mand. The on-chip erase sequence is started when the FCSN pin is set high after the ERASE ALL com-
mand. During the erase sequence all SPI commands are ignored except RDSR.
If infen (bit 3 in FSR) is set high before execution of the ERASE_ALL command both the InfoPage and the
MainBlock are erased, otherwise only the MainBlock is erased.
The device returns to write disable after completion of an ERASE ALL command.
RDFPCR - Read Flash Protect Configuration register
SPI command RDFPCR reads out the flash protect configuration register (FPCR), which contains the con-
figuration of MCU write protected pages in the flash main block. The command is followed by 1 byte data.
Revision 1.1
79 of 191

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