nRF24LE1 Nordic VLSI, nRF24LE1 Datasheet - Page 130

• Manufacturer Part Number: nRF24LE1
• Manufacturer: Nordic VLSI

nRF24LE1 Preliminary Product Specification
The default pin out also includes connections that are conditionally enabled based on the direction set for
the pin. For example, if the P0DIR register in a 24pin 4x4mm package sets pin P0.6 as an input, it can be
used as a MCU GP input and as the UART receiver. If pin P0.5 is programmed as an output, it can be con-
nected to the MCU as a GP output, but also have conditional output from the UART/TXD through an AND
gate.
17.3
The following conventions are used in all pin out maps:
Revision 1.1
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For dynamic connections of digital peripheral blocks, the direction of each pin is indicated by ‘in’,
Dynamic analog connections are indicated with ‘ana’.
Digital peripheral blocks with potentially conflicting IO needs are highlighted with blue background in
the pinout tables.
For blocks marked with a green background, conflicts may exist with other green and blue devices,
depending on the configuration. Please refer to the documentation of the configurable (green)
blocks for information on how the configuration affects the IO usage.
The relative priorities of competing digital peripheral blocks are listed in the table header.
‘out’ or ‘inout’ next to the interface name.
IO pin maps
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