ADSP-21367 Analog Devices, ADSP-21367 Datasheet - Page 20

• Manufacturer Part Number: ADSP-21367
• Description: SHARC Processor
• Manufacturer: Analog Devices

ADSP-21367
Reset
Table 10. Reset
1
Interrupts
The following timing specification applies to the FLAG0,
FLAG1, and FLAG2 pins when they are configured as IRQ0,
IRQ1, and IRQ2 interrupts.
Table 11. Interrupts
Parameter
Timing Requirements
t
t
Parameter
Timing Requirement
t
Applies after the power-up sequence is complete. At power-up, the processor's internal phase-locked loop requires no more than 100 µs while RESET is low, assuming
WRST
SRST
IPW
stable VDD and CLKIN (not including start-up time of external clock oscillator).
1
RESET Pulse Width Low
RESET Setup Before CLKIN Low
IRQx Pulse Width
RESET
CLKIN
FLAG2-0
(IRQ2-0)
DPI14-1
Rev. PrA | Page 20 of 48 | November 2004
Figure 8. Interrupts
Figure 7. Reset
t
WRST
Min
4t
8
CK
t
IPW
Min
2 × t
PCLK
+2
Max
Preliminary Technical Data
t
SRST
Max
Unit
ns
ns
Unit
ns