AD9957 Analog Devices, AD9957 Datasheet - Page 10

• Manufacturer Part Number: AD9957
• Description: 1 GSPS Quadrature Digital Upconverter
• Manufacturer: Analog Devices

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DataSheet
AD9957
MODES OF OPERATION
The AD9957 has three basic operating modes:
• Quadrature modulation mode (default)
• Interpolating DAC mode
• Single-tone mode
The active mode is selected via the QDUC Operating mode bits
(CFR1 <25:24>). The Inverse SINC filter is available in all three
modes.
QUADRATURE MODULATION MODE
A block diagram of the AD9957 operating in the quadrature
modulation mode is shown in Figure 3. In quadrature modula-
tion mode, both I and Q data paths are active and the parallel
data clock (PDCLK) serves to synchronize the input of I/Q data
BLACKFIN INTERFACE MODE
A subset of the quadrature modulation mode is the BlackFin
Interface (BFI) mode, which is shown in Figure 4. In this mode
a separate I and Q serial bit stream is applied to the base band
data port. The serial input provides for 16-bit I and Q words
PDClk
4
I/Q In
TxEn
U
.com
18
FTW
Programming
P arallel Da ta
Registers
3
Tim ing &
Cont rol
Q
I
IS
PW OSF
QS
0
1
1
0
CCI
CCI
Inv.
Inv.
2
Seria l I/O
Port
Halfband
Halfband
Filter s
Filter s
(4x)
(4x)
Inte rna l Clock Timing & Control
Figure 3: Quadrature Modulation Mode
(1x - 63x)
I Q
(1x -63x)
RA M
C I
C I
C
C
IS
QS
Rev. PrF | Page 10 of 38
AD9957
FTW
PW
Control
Po wer
Down
DDS
cos( t+ )
sin( t+ )
to the AD9957. One 18-bit I word and one 18-bit Q word to-
gether comprise one internal sample. Each sample propagates
along the internal data pathway in parallel fashion.
The DDS core provides a quadrature (sine and cosine) local
oscillator signal to the quadrature modulator, where the I and Q
data are multiplied by the respective phase of the carrier and
summed together, producing a quadrature-modulated data
stream. This data stream is routed through Inverse SINC filter
(optionally) and the output scaling multiplier and then applied
to the 14-bit DAC which produces the quadrature-modulated
analog output signal. Note: The profile and I/O_UPDATE pins
are also synchronous to the PDCLK.
(unlike parallel operation, which uses 18-bit words). The
BlackFin Interface mode includes an additional pair of half
band filters in both the I and Q signal paths, increasing the in-
terpolation of the base band data by 4x relative to the normal
quadrature modulation mode.
2
2
Quadrature
3
1
0
2
Modulator
PRELIMINARY TECHNICAL DATA
0
1
sin(x)
Gain
DAC
Multiplier
x
Clock
Sinc Filter
Inverse
8
0
1
AUX
DAC
(8-b)
0
1
2
OSF
2
DAC
(14 -b)
RefClk
RefClk
DAC
Rs et
Iout
Iout