ST92185B STMicroelectronics, ST92185B Datasheet - Page 160
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ST92185B
Manufacturer Part Number
ST92185B
Description
16k/24k/32k Rom Hcmos Mcu With On-screen-display
Manufacturer
STMicroelectronics
Datasheet
1.ST92185B.pdf
(178 pages)
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ST92185B - VOLTAGE SYNTHESIS TUNING CONVERTER (VS)
VOLTAGE SYNTHESIS (Cont’d)
7.8.3 Register Description
VS
(VSDR1)
R254 - Read/Write
Register Page: 59
Reset Value: 0000 0000 (00h)
Bit 7 = VSE: VS enable bit.
0: VS Tuning Converter disabled (i.e. the clock is
1: VS Tuning Converter enabled.
Bit 6 = VSWP: VS Output Select
This bit controls which VS output is enabled to out-
put the VS signal.
0: VSO1 output selected
1: VSO2 output selected
Bit 5:0 = VD[13:8] Tuning word bits.
These bits are the 6 most significant bits of the
Tuning word forming the PWM selection. The
VD13 bit is the MSB.
160/178
VSE
not forwarded to the VS counter and the 2 out-
puts are set to 1 (idle state)
7
DATA
VSWP VD13
6
AND
5
VD12
CONTROL
4
VD11
3
VD10
2
REGISTER
VD9
1
VD8
0
1
VS
(VSDR2)
R255 - Read/Write
Register Page: 59
Reset Value: 0000 0000 (00h)
Bit 7:0 = VD[7:0] Tuning word bits.
These bits are the 8 least significant data bits of
the VS Tuning word. All bits are accessible. Bits
VD6 - VD0 form the BRM pulse selection. VD7 is
the LSB of the 7 bits forming the PWM selection.
VD7
7
DATA
VD6
VD5
AND
VD4
CONTROL
VD3
VD2
REGISTER
VD1
VD0
0
2