ST92185B STMicroelectronics, ST92185B Datasheet - Page 116
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ST92185B
Manufacturer Part Number
ST92185B
Description
16k/24k/32k Rom Hcmos Mcu With On-screen-display
Manufacturer
STMicroelectronics
Datasheet
1.ST92185B.pdf
(178 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST92185BJ2B1/0BE
Manufacturer:
ST
Quantity:
122
Company:
Part Number:
ST92185BN4B1/PBI
Manufacturer:
ST
Quantity:
35
ST92185B - ON SCREEN DISPLAY (OSD)
ON SCREEN DISPLAY (Cont’d)
7.4.6.6 Building a Serial Mode, 80 Char, Line
Mode Display
Half-Page Location:
The pair of 0.5 Kbyte blocks of half page content is
stored in the TDSRAM location pointed to by the
PG3..PG0 bits. The first block contains the left half
rows, the other block contains the right half rows.
Figure 76. Serial (80 Characters) Line Mode Mapping
Figure 77. Serial (80 Characters) Line Mode - Header and Status Mapping
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Row 12/Scroll Buffer
0.5K TDSRAM
Free Space
Row 1 Left
Row 11
Resolution 1K bytes
Resolution 0.5K bytes
0.5K TDSRAM
Status Row 0
Status Row 1
Free Space
Free Space
Row Attr.
Row 12/Scroll Buffer
Header
0.5K TDSRAM
Row 1 Right
Free Space
Row 11
100h
Number(1K)
Block
0
1
2
3
4
5
6
7
See
Header/Status Rows Location:
The 0.5 Kbyte block containing the Header, Status
Row 0 and Status Row 1 is pointed to by the
HS3..HS0 bits.
The Row attribute (row count) is stored in this
block at offset 100h and contains 12 bytes for line
mode (see DCM1R register description).
Row Scrolling Buffer Location:
The scrolling buffer corresponds to Row 12 when
the scrolling feature is used (in this case 11 rows
are scrolled).
Address Left
TDSRAM
Figure 22
(hex)
8C00
9C00
8000
8400
8800
9000
9400
9800
Address Right
for Address Values
TDSRAM
(hex)
8A00
8E00
9A00
9E00
8200
8600
9200
9600
Value (hex)
PG3..PG0
TDPR
A
C
E
0
2
4
6
8
2K
6K
8K