DSPIC33FJ12MC202 Microchip Technology Inc., DSPIC33FJ12MC202 Datasheet - Page 194

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DSPIC33FJ12MC202

Manufacturer Part Number
DSPIC33FJ12MC202
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet

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dsPIC33FJ12MC201/202
18.1
The UART module includes a dedicated 16-bit Baud
Rate Generator (BRG). The BRGx register controls the
period of a free-running 16-bit timer. Equation 18-1
shows the formula for computation of the baud rate
with BRGH = 0.
EQUATION 18-1:
Example 18-1 shows the calculation of the baud rate
error for the following conditions:
• F
• Desired Baud Rate = 9600
The maximum baud rate (BRGH = 0) possible is
F
possible is F
EXAMPLE 18-1:
DS70265B-page 192
CY
Desired Baud Rate
Solving for BRGx Value:
Calculated Baud Rate
Error
Note:
CY
/16 (for BRGx = 0), and the minimum baud rate
= 4 MHz
UART Baud Rate Generator (BRG)
F
frequency (F
CY
CY
Baud Rate =
BRGx =
BRGx
BRGx
BRGx
/(16 * 65536).
denotes the instruction cycle clock
UART BAUD RATE WITH
16 • Baud Rate
BRGH = 0
BAUD RATE ERROR CALCULATION (BRGH = 0)
OSC
=
=
=
=
=
=
=
=
=
16 • (BRGx + 1)
F
/2
CY
F
((F
((4000000/9600)/16) – 1
25
9615
(Calculated Baud Rate – Desired Baud Rate)
(9615 – 9600)/9600
0.16%
4000000/(16 (25 + 1))
).
CY
F
CY
/(16 (BRGx + 1))
CY
/Desired Baud Rate)/16) – 1
– 1
Desired Baud Rate
Preliminary
Equation 18-2 shows the formula for computation of
the baud rate with BRGH = 1.
EQUATION 18-2:
The maximum baud rate (BRGH = 1) possible is F
(for BRGx = 0), and the minimum baud rate possible is
F
Writing a new value to the BRGx register causes the
BRG timer to be reset (cleared). This ensures the BRG
does not wait for a timer overflow before generating the
new baud rate.
CY
Note:
/(4 * 65536).
F
frequency (F
CY
Baud Rate =
BRGx =
denotes the instruction cycle clock
UART BAUD RATE WITH
BRGH =
4 • Baud Rate
© 2007 Microchip Technology Inc.
OSC
4 • (BRGx + 1)
F
/2).
CY
F
1
CY
– 1
CY
/4

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