DSPIC33FJ12MC202 Microchip Technology Inc., DSPIC33FJ12MC202 Datasheet - Page 14

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DSPIC33FJ12MC202

Manufacturer Part Number
DSPIC33FJ12MC202
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet

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dsPIC33FJ12MC201/202
2.3
The dsPIC33FJ12MC201/202 features a 17-bit by 17-
bit single-cycle multiplier that is shared by both the
MCU ALU and DSP engine. The multiplier can perform
signed, unsigned and mixed-sign multiplication. Using
a 17-bit by 17-bit multiplier for 16-bit by 16-bit
multiplication not only allows you to perform mixed-sign
multiplication, it also achieves accurate results for
special operations, such as (-1.0) x (-1.0).
FIGURE 2-1:
DS70265B-page 12
Control Block
Data Access
PSV & Table
Program Memory
Special MCU Features
Address Latch
Data Latch
23
23
Controller
Interrupt
dsPIC33FJ12MC201/202 CPU CORE BLOCK DIAGRAM
23
to Various Blocks
Address Bus
Control Signals
Control
Instruction
Stack
Logic
Decode &
PCU
Program Counter
Control
24
8
PCH
Control
Logic
Loop
16
PCL
Preliminary
Divide Support
DSP Engine
16
Y Data Bus
X Data Bus
Instruction Reg
Data Latch
ROM Latch
Address Generator Units
Address
X RAM
Latch
The dsPIC33FJ12MC201/202 supports 16/16 and 32/
16 divide operations, both fractional and integer. All
divide instructions are iterative operations. They must
be executed within a REPEAT loop, resulting in a total
execution time of 19 instruction cycles. The divide
operation can be interrupted during any of those
19 cycles without loss of data.
A 40-bit barrel shifter is used to perform up to a 16-bit
left or right shift in a single cycle. The barrel shifter can
be used by both MCU and DSP instructions.
16
16
Data Latch
W Register Array
Address
Y RAM
Latch
EA MUX
16 x 16
16
16
16
16-bit ALU
16
16
© 2007 Microchip Technology Inc.
16
16
To Peripheral Modules
16

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