FIN1216 Fairchild Semiconductor, FIN1216 Datasheet - Page 16

• Manufacturer Part Number: FIN1216
• Description: Fin1217 * Fin1218 *fin1215 * Fin1216 Lvds 21-bit Serializers/de-serializers
• Manufacturer: Fairchild Semiconductor

www.fairchildsemi.com
AC Loading and Waveforms
Note: This jitter pattern is used to test the jitter response (Clock Out) of the device over the power supply range with worst jitter
input. The specific test methodology is as follows:
•
•
Switching input data TxIn0 to TxIn20 at 0.5 MHz, and the input clock is shifted to left
CLK1 and CLK2 in Figure 11)
The
case of clock edge jump (3 ns) from graphical controllers. Cycle-to-cycle jitter at TxCLK out pin should be measured cross V
(V
CC
r
noise frequency
3ns cycle-to-cycle input jitter is the static phase error between the two clock sources. Jumping between two clock sources to simulate the worst
2 MHz).
(Continued)
FIGURE 19.
16

3ns and to the right

when data is HIGH (by switching between
CC
r
3ns (cycle-to-cycle) clock
range with 100mV noise