PM5381-BI PMC-Sierra, Inc., PM5381-BI Datasheet - Page 366

• Manufacturer Part Number: PM5381-BI
• Description: ATM UNI, Single Channel ATM PHY Interface for 2488.32Mbps
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2000489, Issue 4
Reserved
XFERI
ABRTI
MAXLI
MINLI
This bit is not used.
The XFERI bit indicates that a transfer of accumulated counter data has occurred. Logic 1 in
this bit position indicates that the RCFP performance monitor counter holding registers have
been updated. This update is initiated by writing to one of the counter register locations, or
by writing to address 0000H. This interrupt can be masked using XFERE. If WCIMODE is
set to logic 1, only over-writing with a ‘1’ clears this bit. If WCIMODE is set to logic 0, then
a read of this register automatically clears the bit.
The ABRTI bit indicates the generation of an interrupt due to the reception of an aborted
packet. This interrupt can be masked using ABRTE. If WCIMODE is set to logic 1, only
over-writing with a ‘1’ clears this bit. If WCIMODE is set to logic 0, then a read of this
register automatically clears the bit.
The MAXLI bit indicates an interrupt due to the reception of a packet exceeding the
programmable maximum packet length. This interrupt can be masked using MAXLE. If
WCIMODE is set to logic 1, only over-writing with a ‘1’ clears this bit. If WCIMODE is set
to logic 0, then a read of this register automatically clears the bit.
The MINLI bit indicates an interrupt due to the reception of a packet that is smaller than the
programmable minimum packet length. This interrupt can be masked using MINLE. If
WCIMODE is set to logic 1, only over-writing with a ‘1’ clears this bit. If WCIMODE is set
to logic 0, then a read of this register automatically clears the bit.
S/UNI-2488 Telecom Standard Product Datasheet
Released
366