PM5366-PI PMC-Sierra, Inc., PM5366-PI Datasheet - Page 99

• Manufacturer Part Number: PM5366-PI
• Description: HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER
• Manufacturer: PMC-Sierra, Inc.

PRELIMINARY
DATASHEET
PMC-2010672
9.17 DS2 Framer (DS2 FRMR)
PROPRIETARY AND CONFIDENTIAL
When multiplexing seven DS2 streams into an M23 formatted DS3 stream, the
MX23 function performs rate adaptation to the DS3 by integral FIFO buffers. The
C-bits are also generated and inserted. Software control is provided to transmit
DS2 AIS and DS2 payload loopback requests. The loopback request is coded by
inverting one of the three C-bits (the default option is compatible with ANSI
T1.107a Section 8.2.1 and TR-TSY-000009 Section 3.7). The MX23 also
supports generation of a C-bit Parity formatted DS3 stream by providing an
internally generated DS2 rate clock corresponding to a 100% stuffing ratio.
Integrated M13 applications are supported by providing an internally generated
DS2 rate clock corresponding to a 39.1% stuffing ratio.
When demultiplexing seven DS2 streams from an M23 formatted DS3, the MX23
performs bit destuffing via interpretation of the C-bits. The MX23 also detects
and indicates DS2 payload loopback requests encoded in the C-bits. As per
ANSI T1.107a Section 8.2.1 and TR-TSY-000009 Section 3.7, the loopback
command is identified as C3 being the inverse of C1 and C2. Because TR-TSY-
000233 Section 5.3.14.1 recommends compatibility with non-compliant existing
equipment, the two other loopback command possibilities are also supported. As
per TR-TSY-000009 Section 3.7, the loopback request must be present for five
successive M-frames before declaration of detection. Removal of the loopback
request is declared when it has been absent for five successive M-frames.
DS2 payload loopback can be activated or deactivated under software control.
During payload loopback the DS2 stream being looped back still continues
unaffected in the demultiplex direction to the DS2 Framer. All seven
demultiplexed DS2 streams can also be replaced with AIS on an individual basis
under register control or they can be configured to be replaced automatically on
detection of out of frame, loss of signal, RED alarm or alarm indication signal.
The DS2 Framer (DS2-FRMR) integrates circuitry required for framing to a DS2
bit stream and is directly compatible with the M12 DS2 application.
The DS2 FRMR frames to a DS2 signal with a maximum average reframe time
of less than 7 ms. Both the F-bits and M-bits must be correct for a significant
period of time before frame alignment is declared. Once in frame, the DS2
FRMR provides indications of the M-frame and M-subframe boundaries, and
identifies the overhead bit positions in the incoming DS2 signal.
Depending on configuration, declaration of DS2 out-of-frame occurs when 2 out
of 4 or 2 out of 5 consecutive F-bits are in error (These two ratios are
recommended in TR-TSY-000009 Section 4.1.2) or when one or more M-bit
errors are detected in 3 out of 4 consecutive M-frames. The M-bit error criteria
for OOF can be disabled via the MBDIS bit in the DS2 Framer configuration
ISSUE 1
87
HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PM5366 TEMAP-84