PM5366-PI PMC-Sierra, Inc., PM5366-PI Datasheet - Page 47

• Manufacturer Part Number: PM5366-PI
• Description: HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER
• Manufacturer: PMC-Sierra, Inc.

PRELIMINARY
DATASHEET
PMC-2010672
Pin Name
EFBWCLK[3]
EFBWCLK[2]
EFBWCLK[1]
EFBWDREQ[3]
EFBWDREQ[2]
EFBWDREQ[1]
PROPRIETARY AND CONFIDENTIAL
Type
Input
Input
ISSUE 1
Pin
No.
P22
M22
J22
P21
M21
J19
Function
The Egress Flexible Bandwidth Clocks
(EFBWCLK[3:1]). The EFBWCLK[3:1] clocks provide
the timing for an arbitrary bandwidth payload extracted
from the System Add Bus (SADATA[7:0]). Each clock
is associated with one SPE and is only used when the
associated SPE is configured to carry a fractional
payload by the OPMODE_SPEx[2:0] bits of the SPE
Configuration registers.
EFBWCLK[3:1] may have a maximum frequency of
51.84 MHz and may be gapped if required.
Each EFBWCLK samples the associated EBWDREQ
on the rising edge and updates the associated
EFBWDAT] and EFBWEN on the falling edge.
The Egress Flexible Bandwidth Data Requests
(EFBWREQ[3:1]). The data request input must be
asserted high for a EFBWCLK cycle for each bit of
data required. In response to sampling
EFWBDREQ[3:1] high, the associated EFBWDAT
output will either present an available bit a cycle later
with an accompanying assertion of the associated
EFBWEN or ignore the request if no data is ready. In
many applications (eg. frame relay and ATM), every
request will be acknowledged with data. In
applications where the source data is fixed, it is
permissible to hold EFBWDREQ[3:1] high, in which
case EFBWEN identifies valid bytes.
EFBWDREQ[3:1] are sampled on the rising edge of
the associated EFBWCLK input.
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HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER
AND M13 MULTIPLEXER
PM5366 TEMAP-84